8(- 4,Toradex Apalis iMX8QM/QP on Apalis Evaluation Board82toradex,apalis-imx8-evaltoradex,apalis-imx8fsl,imx8qmaliases=/bus@5b000000/mmc@5b010000B/bus@5b000000/mmc@5b020000G/bus@5b000000/mmc@5b030000L/bus@5a000000/serial@5a060000T/bus@5a000000/serial@5a070000\/bus@5a000000/serial@5a080000d/bus@5a000000/serial@5a090000 l/vpu@2c000000/vpu-core@2d080000 v/vpu@2c000000/vpu-core@2d090000 /vpu@2c000000/vpu-core@2d0a0000"/bus@5a000000/i2c@5a820000/rtc@68/system-controller/rtccpus cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpu2arm,cortex-a53 psci@@ & :Icpu@1cpu2arm,cortex-a53 psci@@ & :Icpu@2cpu2arm,cortex-a53 psci@@ & :Icpu@3cpu2arm,cortex-a53 psci@@ & :Icpu@100cpu2arm,cortex-a72 psci@@ & :Icpu@101cpu2arm,cortex-a72 psci & :Il2-cache02cacheQ]@I l2-cache12cacheQ]@I opp-table-02operating-points-v2kI opp-600000000v#F} Iopp-896000000v5g}B@Iopp-1104000000vAʹ}Iopp-1200000000vG}Iopp-table-12operating-points-v2kI opp-600000000v#F}B@Iopp-1056000000v>H}B@Iopp-1296000000vM?d}Iopp-1596000000v_!}Iinterrupt-controller@51a00000 2arm,gic-v3PQQ R RR  Ipmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smctimer2arm,armv8-timer0   iommu@51400000 2arm,mmu-500Q@                                 Isystem-controller 2fsl,imx-scu tx0rx0gip3$  power-controller2fsl,imx8qm-scu-pdfsl,scu-pd I%clock-controller2fsl,imx8qm-clkfsl,scu-clkIpinctrl2fsl,imx8qm-iomuxc,defaultH:Iadc0grp0D````Iadc1grp0D````Icam1gpiosgrpDC!D!l!m!n!o!p!q!r!c!j!k!Idap1gpiosgrpTDd!!X!y!!~!^!Iesai0gpiosgrpDh!i!Ifec1grpD               9 3`Ifec1-sleepgrpD@@@@@@@@@@@@@@@9@3@Ifec2gpiosgrpD !!!!! ! ! !!!!!!Iflexcan0grpD!!Iflexcan1grpD!!Iflexcan2grpD!!Igpio1grp D !gpio2grp D !gpio3grp D !Igpio4grp D!Igpio5grp D!Igpio6grp D!Igpio7grp D!Igpio8grp D!Igpiobklongrp D2!Igpiokeysgrp Dep!Igpiousbhocngrp D!Ihdmictrlgrp DNaIlpi2c1grpD  I{lpi2c2grpD  Ilpi2c3grpD  Ilpspi0grp0DuLvLwLxLIglpspi2grp0DzL{L|L}LIklpuart0grpD  Iolpuart1grp0D    Iqlpuart1ctrlgrp0D!! ! !Ilpuart2grpD6 7 Islpuart3grp0D< =   Iulvds0i2c0gpiogrp D4!Ilvds1i2c0gpiosgrpD:!;!Imipidsi0-1engrp D5!Imipidsi1gpiosgrp DE!Imlbgpiosgrp D!Immc1cdgrp DZ!Immc1cdsleepgrp DZ!Ipciebgrp$D!!!pciesatarefclkgrp D!Ipciewifirefclkgrp D\!Ipwm0grp D Ipwm1grp D Ipwm2grp D Ipwm3grp D Ipwmbklgrp D8 qspi1agpiosgrp`D!!!!!!!!Iresetmocigrp D&!sai1grp0DlLLLsata1actgrp DY!Isd1cdgrp D!Isgtl5000grp DsLsim0gpiosgrp0D!!!!Ispdif0grpD`@_@touchctrlgpiosgrp0DU!VAb!fAItouchctrlidlegrp0D!!!!Iusbh1activegrpDusbh1idlegrpDusb3503agrp$D'A)!*AI|usbhengrp D!Iusbotg1grpD!!Iusdhc1grpDA!!!!!!!!!A!Iusdhc1-100mhzgrpD@ @ Iusdhc1-200mhzgrpD@ @ Iusdhc1gpiosgrp D!Iusdhc2grp4bitgrpTDA!!!!!!Iusdhc2-4bit100mhzgrpTD@ !Iusdhc2-4bit200mhzgrpTD@ !Iusdhc2grp8bitgrp0D!!!!Iusdhc2-8bit100mhzgrp0D Iusdhc2-8bit200mhzgrp0D Iusdhc2-4bitsleepgrpTDaaaaaa!Iusdhc2-8bitsleepgrp0DaaaaIusdhc3grpTDA!!!!!!Iusdhc3-100mhzgrpTDA!!!!!!Iusdhc3-200mhzgrpTDA!!!!!!IwifigrpD+!H!wifipdngrp DL!Ilpi2c0grpDR"S"Iyrtc2fsl,imx8qxp-sc-rtcocotp2fsl,imx8qm-scu-ocotp Mmac@1c4mac@1c6thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermalWI thermal-zonescpu0-thermalm tripstrip0passiveI!trip1 criticalcooling-mapsmap0!0cpu1-thermalm tripstrip0passiveI"trip1 criticalcooling-mapsmap0"gpu0-thermalm tripstrip0passivetrip1 criticalgpu1-thermalm tripstrip0passivetrip1 criticaldrc0-thermalm tripstrip0passivetrip1 criticalclock-dummy 2fixed-clock clk_dummyI+clock-esai1-rx 2fixed-clock esai1_rx_clkIIclock-esai1-rx-hf 2fixed-clockesai1_rx_hf_clkIJclock-esai1-tx 2fixed-clock esai1_tx_clkIKclock-esai1-tx-hf 2fixed-clockesai1_tx_hf_clkILclock-hdmi-rx-mclk 2fixed-clock hdmi-rx-mclkIBclock-mlb-clk 2fixed-clockmlb_clkIAclock-sai5-rx-bclk 2fixed-clock sai5_rx_bclkIUclock-sai5-tx-bclk 2fixed-clock sai5_tx_bclkclock-sai6-rx-bclk 2fixed-clock sai6_rx_bclkIVclock-sai6-tx-bclk 2fixed-clock sai6_tx_bclkclock-spdif1-rx 2fixed-clock spdif1_rxclock-cm41-ipg 2fixed-clock) cm41_ipg_clkI&bus@38000000 2simple-bus 88#i2c@3b230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c;# $$peripg 4n6'%4 5disabledintmux@3b4000002fsl,imx-intmux;@`'&ipg'%5 5disabledI#clock-controller@3b6300002fsl,imx8qxp-lpcg;c4&<(cm41_lpcg_i2c_clkcm41_lpcg_i2c_ipg_clk'%4I$clock-audio-ipg 2fixed-clock'audio_ipg_clkI/clock-ext-aud-mclk0 2fixed-clockext_aud_mclk0ICclock-ext-aud-mclk1 2fixed-clockext_aud_mclk1IDclock-esai0-rx 2fixed-clock esai0_rx_clkIEclock-esai0-rx-hf 2fixed-clockesai0_rx_hf_clkIFclock-esai0-tx 2fixed-clock esai0_tx_clkIGclock-esai0-tx-hf 2fixed-clockesai0_tx_hf_clkIHclock-spdif0-rx 2fixed-clock spdif0_rxIMclock-sai0-rx-bclk 2fixed-clock sai0_rx_bclkINclock-sai0-tx-bclk 2fixed-clock sai0_tx_bclkIOclock-sai1-rx-bclk 2fixed-clock sai1_rx_bclkIPclock-sai1-tx-bclk 2fixed-clock sai1_tx_bclkIQclock-sai2-rx-bclk 2fixed-clock sai2_rx_bclkIRclock-sai3-rx-bclk 2fixed-clock sai3_rx_bclkISclock-sai4-rx-bclk 2fixed-clock sai4_rx_bclkITbus@59000000 2simple-bus YYasrc@590000002fsl,imx8qm-asrcY td''()**+++++++++++++memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`J,,,,,,OrxarxbrxctxatxbtxcY@gv'% 5disabledesai@590100002fsl,imx8qm-esaiY ---+coreextalfsysspba J,,Orxtx'% 5disabledspdif@590200002fsl,imx8qm-spdifY0.+.+++/+++:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba J,, Orxtx'% 5disabledsai@590400002fsl,imx8qm-saiY :0+0++busmclk0mclk1mclk2mclk3Orxtx J, , '%> 5disabledsai@590500002fsl,imx8qm-saiY <1+1++busmclk0mclk1mclk2mclk3Orxtx J,,'%? 5disabledsai@590600002fsl,imx8qm-saiY >2+2++busmclk0mclk1mclk2mclk3OrxJ,'%@ 5disabledsai@590700002fsl,imx8qm-saiY C3+3++busmclk0mclk1mclk2mclk3OrxJ,'% 5disableddma-controller@591f00002fsl,imx8qm-edmaYvwxyz{;;==?DFH'%%%%%%%%%%%%%%%%%%%%I,clock-controller@594000002fsl,imx8qxp-lpcgY@//<&asrc0_lpcg_ipg_clkasrc0_lpcg_mem_clk'%I'clock-controller@594100002fsl,imx8qxp-lpcgYA */<(esai0_lpcg_extal_clkesai0_lpcg_ipg_clk'%I-clock-controller@594200002fsl,imx8qxp-lpcgYB */<%spdif0_lpcg_tx_clkspdif0_lpcg_gclkw'%I.clock-controller@594400002fsl,imx8qxp-lpcgYD * /<!sai0_lpcg_mclksai0_lpcg_ipg_clk'%>I0clock-controller@594500002fsl,imx8qxp-lpcgYE * /<!sai1_lpcg_mclksai1_lpcg_ipg_clk'%?I1clock-controller@594600002fsl,imx8qxp-lpcgYF */<!sai2_lpcg_mclksai2_lpcg_ipg_clk'%@I2clock-controller@594700002fsl,imx8qxp-lpcgYG */<!sai3_lpcg_mclksai3_lpcg_ipg_clk'%I3clock-controller@595800002fsl,imx8qxp-lpcgYX /// <4dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clk'% 5disabledI4clock-controller@595900002fsl,imx8qxp-lpcgYY/<dsp_ram_lpcg_ipg_clk'% 5disabledI5dsp@596e80002fsl,imx8qxp-dspYn454ipgocramcore '%%%%txdb0txdb1rxdb0rxdb106666 5disabledasrc@598000002fsl,imx8qm-asrcY |d77()**+++++++++++++memipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`J888888OrxarxbrxctxatxbtxcY@gv'% 5disabledsai@598200002fsl,imx8qm-saiY I9+9++busmclk0mclk1mclk2mclk3 J88 Orxtx'% 5disabledI<sai@598300002fsl,imx8qm-saiY K:+:++busmclk0mclk1mclk2mclk3J8 Otx'% 5disabledI=amix@598400002fsl,imx8qm-audmixY;ipg'%<= 5disabledmqs@598500002fsl,imx8qm-mqsY>> mclkcore'% 5disableddma-controller@599f00002fsl,imx8qm-edmaY  ~JJLX'%%%%%%%%%%%I8clock-controller@59d000002fsl,imx8qxp-lpcgY E<aud_rec_clk0_lpcg_clk'%EI?clock-controller@59d100002fsl,imx8qxp-lpcgY <aud_rec_clk1_lpcg_clk'%I@clock-controller@59d200002fsl,imx8qxp-lpcgY E<aud_pll_div_clk0_lpcg_clk'%EI(clock-controller@59d300002fsl,imx8qxp-lpcgY <aud_pll_div_clk1_lpcg_clk'%I)clock-controller@59d500002fsl,imx8qxp-lpcgY*<mclkout0_lpcg_clk'%clock-controller@59d600002fsl,imx8qxp-lpcgY*<mclkout1_lpcg_clk'%acm@59e000002fsl,imx8qm-acmY'%%%%%E%%%%%%>%?%@%%%%%%%%|?@()ABCDEFGHIJKLMMNOPQRSTUVaud_rec_clk0_lpcg_clkaud_rec_clk1_lpcg_clkaud_pll_div_clk0_lpcg_clkaud_pll_div_clk1_lpcg_clkmlb_clkhdmi_rx_mclkext_aud_mclk0ext_aud_mclk1esai0_rx_clkesai0_rx_hf_clkesai0_tx_clkesai0_tx_hf_clkesai1_rx_clkesai1_rx_hf_clkesai1_tx_clkesai1_tx_hf_clkspdif0_rxspdif1_rxsai0_rx_bclksai0_tx_bclksai1_rx_bclksai1_tx_bclksai2_rx_bclksai3_rx_bclksai4_rx_bclksai5_tx_bclksai6_rx_bclkI*clock-controller@59c000002fsl,imx8qxp-lpcgY//<&asrc1_lpcg_ipg_clkasrc1_lpcg_mem_clk'%I7clock-controller@59c200002fsl,imx8qxp-lpcgY */<!sai6_lpcg_mclksai6_lpcg_ipg_clk'%I9clock-controller@59c300002fsl,imx8qxp-lpcgY */<!sai7_lpcg_mclksai7_lpcg_ipg_clk'%I:clock-controller@59c400002fsl,imx8qxp-lpcgY/<amix_lpcg_ipg_clk'%I;clock-controller@59c500002fsl,imx8qxp-lpcgY */<!mqs0_lpcg_mclkmqs0_lpcg_ipg_clk'%I>sai@590800002fsl,imx8qm-saiY EW+W++busmclk0mclk1mclk2mclk3OrxJ, '% 5disabledsai@590900002fsl,imx8qm-saiY  GX+X++busmclk0mclk1mclk2mclk3OtxJ, '% 5disabledclock-controller@594800002fsl,imx8qxp-lpcgYH */<!sai4_lpcg_mclksai4_lpcg_ipg_clk'% 5disabledIWclock-controller@594900002fsl,imx8qxp-lpcgYI */<!sai5_lpcg_mclksai5_lpcg_ipg_clk'% 5disabledIXesai@598100002fsl,imx8qm-esaiY YYY+coreextalfsysspba J88Orxtx'% 5disabledclock-controller@59c100002fsl,imx8qxp-lpcgY */<(esai1_lpcg_extal_clkesai1_lpcg_ipg_clk'%IYvpu@2c000000 ,,,'%5okay2nxp,imx8qm-vpumailbox@2d0000002fsl,imx6sx-mu- '%5okayIZmailbox@2d0200002fsl,imx6sx-mu- '%5okayI]mailbox@2d0400002fsl,imx6sx-mu- '%5okayI`vpu-core@2d080000-2nxp,imx8q-vpu-decoder'% tx0tx1rx$ZZZ5okay[\vpu-core@2d090000- 2nxp,imx8q-vpu-encoder'% tx0tx1rx$]]]5okay^_vpu-core@2d0a0000- 2nxp,imx8q-vpu-encoder'% tx0tx1rx$```5okayabbus@53000000 2simple-bus SSgpu@53100000 2vivante,gcS @ coreshader)'2'%clock-img-ipg 2fixed-clock  img_ipg_clkIebus@58000000 2simple-bus XXjpegdec@58400000X@ 5cccc '%%%2nxp,imx8qm-jpgdecnxp,imx8qxp-jpgdec5okayjpegenc@58450000XE 1dddd '%%%2nxp,imx8qm-jpgencnxp,imx8qxp-jpgenc5okayclock-controller@585d00002fsl,imx8qxp-lpcgX]ee<0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clk'%Icclock-controller@585f00002fsl,imx8qxp-lpcgX_ee<0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clk'%Idclock-dma-ipg 2fixed-clock' dma_ipg_clkIwbus@5a000000 2simple-bus ZZspi@5a0000002fsl,imx7ulp-spiZ  Pffperipg 5'%55okay,default:g hspi@5a0100002fsl,imx7ulp-spiZ  Qiiperipg 6'%6 5disabledspi@5a0200002fsl,imx7ulp-spiZ  Rjjperipg 7'%75okay,default:k h spi@5a0300002fsl,imx7ulp-spiZ  Sllperipg 8'%8 5disabledserial@5a060000Z Ymm ipgbaud 9Ĵ'%9Orxtx Jn n 5okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart,default:oserial@5a070000Z Zpp ipgbaud :Ĵ'%:Orxtx Jnn5okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart,default:qserial@5a080000Z [rr ipgbaud ;Ĵ'%;Orxtx Jnn5okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart,default:sserial@5a090000Z  \tt ipgbaud <Ĵ'%<Orxtx Jnn5okay%2fsl,imx8qm-lpuartfsl,imx8qxp-lpuart,default:upwm@5a1900002fsl,imx8qxp-pwmfsl,imx27-pwmZ vvipgper n6'%dma-controller@5a1f00002fsl,imx8qm-edmaZ'%@%A%B%C%D%E%F%G%H%I%J%K%L%M%N%O%P%Q%R%S%T%U5okayInclock-controller@5a4000002fsl,imx8qxp-lpcgZ@5w< spi0_lpcg_clkspi0_lpcg_ipg_clk'%5Ifclock-controller@5a4100002fsl,imx8qxp-lpcgZA6w< spi1_lpcg_clkspi1_lpcg_ipg_clk'%6Iiclock-controller@5a4200002fsl,imx8qxp-lpcgZB7w< spi2_lpcg_clkspi2_lpcg_ipg_clk'%7Ijclock-controller@5a4300002fsl,imx8qxp-lpcgZC8w< spi3_lpcg_clkspi3_lpcg_ipg_clk'%8Ilclock-controller@5a4600002fsl,imx8qxp-lpcgZF9w<'uart0_lpcg_baud_clkuart0_lpcg_ipg_clk'%9Imclock-controller@5a4700002fsl,imx8qxp-lpcgZG:w<'uart1_lpcg_baud_clkuart1_lpcg_ipg_clk'%:Ipclock-controller@5a4800002fsl,imx8qxp-lpcgZH;w<'uart2_lpcg_baud_clkuart2_lpcg_ipg_clk'%;Irclock-controller@5a4900002fsl,imx8qxp-lpcgZI<w<'uart3_lpcg_baud_clkuart3_lpcg_ipg_clk'%<Itclock-controller@5a5900002fsl,imx8qxp-lpcgZYw<(adma_pwm_lpcg_clkadma_pwm_lpcg_ipg_clk'%Ivi2c@5a800000Z@ xxperipg `n6'%` 5disabled#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2c,default:y i2c@5a810000Z@ zzperipg an6'%a5okay#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2c,default:{ usb-hub@82smsc,usb3503a,default:| } ~}x@ ,~i2c@5a820000Z@ peripg bn6'%b5okay#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2c,default: touch@4a2atmel,maxtouchJ,default: , 5disabledrtc@68 2st,m41t0h5okayi2c@5a830000Z@ peripg cn6'%c5okay#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2c,default: adc@5a8800002nxp,imx8qxp-adc8Z peripg en6'%e5okay,default:adc@5a8900002nxp,imx8qxp-adc8Z peripg fn6'%f5okay,default:Ican@5a8d00002fsl,imx8qm-flexcanZ ipgper ibZ'%iJY5okay,default:can@5a8e00002fsl,imx8qm-flexcanZ ipgper jbZ'%jJY5okay,default:can@5a8f00002fsl,imx8qm-flexcanZ ipgper kbZ'%kJY 5disabled,default:dma-controller@5a9f00002fsl,imx8qm-edmaZ! xP'%l%m%n%o%p%q%r%s%t%uclock-controller@5ac000002fsl,imx8qxp-lpcgZ`w< i2c0_lpcg_clki2c0_lpcg_ipg_clk'%`Ixclock-controller@5ac100002fsl,imx8qxp-lpcgZaw< i2c1_lpcg_clki2c1_lpcg_ipg_clk'%aIzclock-controller@5ac200002fsl,imx8qxp-lpcgZbw< i2c2_lpcg_clki2c2_lpcg_ipg_clk'%bIclock-controller@5ac300002fsl,imx8qxp-lpcgZcw< i2c3_lpcg_clki2c3_lpcg_ipg_clk'%cIclock-controller@5ac800002fsl,imx8qxp-lpcgZew< adc0_lpcg_clkadc0_lpcg_ipg_clk'%eIclock-controller@5ac900002fsl,imx8qxp-lpcgZfw< adc1_lpcg_clkadc1_lpcg_ipg_clk'%fIclock-controller@5acd00002fsl,imx8qxp-lpcgZiww <5can0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clk'%iIclock-controller@5a4a00002fsl,imx8qxp-lpcgZJ=w<'uart4_lpcg_baud_clkuart4_lpcg_ipg_clk'%=i2c@5a840000#2fsl,imx8qm-lpi2cfsl,imx7ulp-lpi2cZ@ Xperipg dn6'%d 5disabledclock-controller@5ac400002fsl,imx8qxp-lpcgZdw< i2c4_lpcg_clki2c4_lpcg_ipg_clk'%dIclock-controller@5ace00002fsl,imx8qxp-lpcgZjww <5can1_lpcg_pe_clkcan1_lpcg_ipg_clkcan1_lpcg_chi_clk'%jIclock-controller@5acf00002fsl,imx8qxp-lpcgZkww <5can2_lpcg_pe_clkcan2_lpcg_ipg_clkcan2_lpcg_chi_clk'%kIclock-conn-axi 2fixed-clockCU conn_axi_clkIclock-conn-ahb 2fixed-clock ! conn_ahb_clkIclock-conn-ipg 2fixed-clock conn_ipg_clkIclock-conn-bch 2fixed-clockׄ conn_bch_clkbus@5b000000 2simple-bus [[usb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb[   gr~'%5okay,default:usbmisc@5b0d020082fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc[ Iusbphy@5b1000002fsl,imx7ulp-usbphy['%5okayImmc@5b010000 [ ipgahbper'%5okay32fsl,imx8qm-usdhcfsl,imx8qxp-usdhcfsl,imx7d-usdhc !",defaultstate_100mhzstate_200mhz:(2<Fmmc@5b020000 [ ipgahbper'%Ti5okay32fsl,imx8qm-usdhcfsl,imx8qxp-usdhcfsl,imx7d-usdhc !(,defaultstate_100mhzstate_200mhzsleep : ( 2 y<  mmc@5b030000 [ ipgahbper'%5okay32fsl,imx8qm-usdhcfsl,imx8qxp-usdhcfsl,imx7d-usdhc !",defaultstate_100mhzstate_200mhz:(2<  ethernet@5b040000[0  ipgahbenet_clk_refptp沀sY@'%5okay2fsl,imx8qm-fecfsl,imx6sx-fec !,defaultsleep:( rgmii-rxidmdio ethernet-phy@72ethernet-phy-ieee802.3-c22~ ,~ Iethernet@5b050000[0  ipgahbenet_clk_refptp沀sY@'% 5disabled2fsl,imx8qm-fecfsl,imx6sx-fec !usb@5b1100002fsl,imx8qm-usb3[ (lpmbusaclkipgcore 沀'% 5disabledusb@5b120000 2cdns,usb3[[[ otgxhcidev0hostperipheralotgwakeup*/cdns3,usb3-phy9 5disabledusb-phy@5b1600002nxp,salvo-phy[salvo_phy_clk'%P 5disabledIclock-controller@5b2000002fsl,imx8qxp-lpcg[  <9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clk'%Iclock-controller@5b2100002fsl,imx8qxp-lpcg[! <9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clk'%Iclock-controller@5b2200002fsl,imx8qxp-lpcg[" <9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clk'%Iclock-controller@5b2300002fsl,imx8qxp-lpcg[#0< enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clk'%Iclock-controller@5b2400002fsl,imx8qxp-lpcg[$0< enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk'%Iclock-controller@5b2700002fsl,imx8qxp-lpcg['<"usboh3_ahb_clkusboh3_phy_ipg_clk'%Iclock-controller@5b2800002fsl,imx8qxp-lpcg[(<0Musb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclk'%Iclock-controller@5b2900002fsl,imx8qxp-lpcg[)   <'gpmi_bchgpmi_iogpmi_apbgpmi_bch_apb'% Iclock-controller@5b2900042fsl,imx8qxp-lpcg[)< apbhdma_hclk'% Idma-controller@5b810000(2fsl,imx8qxp-dma-apbhfsl,imx28-dma-apbh[ 0'% Inand-controller@5b8120002fsl,imx8qxp-gpmi-nand[ [@ gpmi-nandbch  bch 'gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbJOrx-tx'%    5disabledclock-lsio-bus 2fixed-clock lsio_bus_clkIbus@5d000000 2simple-bus  ]]pwm@5d0000002fsl,imx27-pwm]ipgper n6 ^5okay,default:pwm@5d0100002fsl,imx27-pwm]ipgper n6 _5okay,default:pwm@5d0200002fsl,imx27-pwm]ipgper n6 `5okay,default:pwm@5d0300002fsl,imx27-pwm]ipgper n6 a5okay,default:gpio@5d080000] [k'%2fsl,imx8qm-gpiofsl,imx35-gpio0w$MXM3_279MXM3_277MXM3_135MXM3_203MXM3_201MXM3_275MXM3_110MXM3_120MXM3_1/GPIO1MXM3_3/GPIO2MXM3_124MXM3_122MXM3_5/GPIO3MXM3_7/GPIO4MXM3_4MXM3_211MXM3_209MXM3_2MXM3_136MXM3_134MXM3_6MXM3_8MXM3_112MXM3_118MXM3_114MXM3_116I}gpio@5d090000]  [k'%2fsl,imx8qm-gpiofsl,imx35-gpio@w(2 ?H}MXM3_286MXM3_87MXM3_99MXM3_138MXM3_140MXM3_239MXM3_281MXM3_283MXM3_126MXM3_132MXM3_173MXM3_175MXM3_123I~hdmi-ctrl-hog,default:CONNECTOR_IS_HDMIgpio@5d0a0000]  [k'%2fsl,imx8qm-gpiofsl,imx35-gpio0wPUh MXM3_198MXM3_35MXM3_164MXM3_217MXM3_215MXM3_193MXM3_194MXM3_37MXM3_271MXM3_273MXM3_195MXM3_197MXM3_177MXM3_179MXM3_181MXM3_183MXM3_185MXM3_187Ipcie-wifi-hog,default: PCIE_WIFI_CLKgpio@5d0b0000]  [k'%2fsl,imx8qm-gpiofsl,imx35-gpiowruMXM3_191MXM3_221MXM3_225MXM3_223MXM3_227MXM3_200MXM3_235MXM3_231MXM3_229MXM3_233MXM3_204MXM3_196MXM3_202MXM3_305MXM3_307MXM3_309MXM3_311MXM3_315MXM3_317MXM3_319MXM3_321MXM3_15/GPIO7MXM3_63MXM3_17/GPIO8MXM3_12MXM3_14MXM3_16Ihgpio@5d0c0000]  [k'%2fsl,imx8qm-gpiofsl,imx35-gpio`w MXM3_18MXM3_11/GPIO5MXM3_13/GPIO6MXM3_274MXM3_84MXM3_262MXM3_96MXM3_190MXM3_269MXM3_251MXM3_253MXM3_295MXM3_299MXM3_301MXM3_297MXM3_293MXM3_291MXM3_289MXM3_287Ipcie-sata-hog,default:PCIE_SATA_CLKgpio@5d0d0000]  [k'%2fsl,imx8qm-gpiofsl,imx35-gpiow MXM3_150MXM3_160MXM3_162MXM3_144MXM3_146MXM3_148MXM3_152MXM3_156MXM3_158MXM3_159MXM3_184MXM3_180MXM3_186MXM3_188MXM3_176MXM3_178gpio@5d0e0000] [k'%2fsl,imx8qm-gpiofsl,imx35-gpio w  vMXM3_261MXM3_263MXM3_259MXM3_257MXM3_255MXM3_128MXM3_130MXM3_265MXM3_249MXM3_247MXM3_245MXM3_243gpio@5d0f0000] [k'%2fsl,imx8qm-gpiofsl,imx35-gpiospi@5d120000 2nxp,imx8qxp-fspi]fspi_basefspi_mmap \ fspi_enfspi'% 5disabledmailbox@5d1b0000]  5disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-mumailbox@5d1c0000] ,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-muI mailbox@5d1d0000]  5disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-mumailbox@5d1e0000]  5disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-mumailbox@5d1f0000]  5disabled,2fsl,imx8-mu-scufsl,imx8qm-mufsl,imx6sx-mumailbox@5d200000]  '% 5disabled2fsl,imx8qm-mufsl,imx6sx-mumailbox@5d210000]! '% 5disabled2fsl,imx8qm-mufsl,imx6sx-mumailbox@5d280000]( '%2fsl,imx8qm-mufsl,imx6sx-muI6clock-controller@5d4000002fsl,imx8qxp-lpcg]@4<hpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clk'%Iclock-controller@5d4100002fsl,imx8qxp-lpcg]A4<hpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clk'%Iclock-controller@5d4200002fsl,imx8qxp-lpcg]B4<hpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clk'%Iclock-controller@5d4300002fsl,imx8qxp-lpcg]C4<hpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clk'%Iclock-controller@5d4400002fsl,imx8qxp-lpcg]D4<hpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clk'%clock-controller@5d4500002fsl,imx8qxp-lpcg]E4<hpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clk'%clock-controller@5d4600002fsl,imx8qxp-lpcg]F4<hpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clk'%clock-controller@5d4700002fsl,imx8qxp-lpcg]G4<hpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clk'%chosen/bus@5a000000/serial@5a070000backlight2pwm-backlight,default: -?Xw ~ 5disabledgpio-fan 2gpio-fan,default: h regulator-ext-rgmii2regulator-fixed'%  2Z!2Z9VDD_EXT_RGMII (LDO1)regulator-state-memHregulator-module-3v32regulator-fixed 2Z!2Z9+V3.3regulator-module-3v3-avdd2regulator-fixed 2Z!2Z 9+V3.3_AUDIOregulator-module-wifi2regulator-fixed,default: a~fy9wifi_pwrdn_fake_regulatordregulator-pcie-switch2regulator-fixed,default: ahf w@!w@ 9pcie_switchregulator-usb-host-vbus2regulator-fixed,default: afy LK@!LK@9VCC USBH2(ABCD) / USBH(3|4)regulator-usb-hsic2regulator-fixed -!-9usb-hsic-dummyregulator-usb-hsic12regulator-fixed -!-9usb-phy-dummyIreserved-memory decoder-boot@84000000I[encoder1-boot@86000000 I^encoder2-boot@86200000 Iam4@88000000rpmsg@90200000 vdevbuffer@904000002shared-dma-pool@decoder-rpc@92000000 I\dsp@92400000@encoder1-rpc@94400000@pI_encoder2-rpc@94b00000pIblinux,cma2shared-dma-pool<<touchscreen2toradex,vf50-touchscreenh ,idledefault:(      $ 5disabled interrupt-parent#address-cells#size-cellsmodelcompatiblemmc0mmc1mmc2serial0serial1serial2serial3vpu-core0vpu-core1vpu-core2rtc0rtc1cpudevice_typeregclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterrupts#global-interrupts#iommu-cellsmbox-namesmboxes#power-domain-cells#clock-cellspinctrl-namespinctrl-0fsl,pinsread-only#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceclock-frequencyclock-output-namesrangesclock-namesassigned-clocksassigned-clock-ratespower-domainsstatusclock-indicesdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-map#dma-cellsdma-channelsdma-channel-maskdaisfsl,dataline#mbox-cellsmemory-regionslotcs-gpios#pwm-cellsconnect-gpiosinitial-modeintn-gpiosrefclk-frequencyreset-gpios#io-channel-cellsfsl,clk-sourcefsl,scu-indexfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordadp-disablehnp-disableover-current-active-lowpower-active-highsrp-disable#index-cellsphy-3p0-supplyiommuspinctrl-1pinctrl-2bus-widthnon-removablefsl,tuning-start-tapfsl,tuning-steppinctrl-3cd-gpiosno-1-8-vfsl,num-tx-queuesfsl,num-rx-queuesfsl,magic-packetphy-handlephy-modemicrel,led-modereset-assert-usreset-deassert-usreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-controller#gpio-cellsgpio-rangesgpio-line-namesgpio-hogline-nameoutput-highstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiosgpio-fan,speed-mapregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-off-in-suspendgpioenable-active-highregulator-always-onregulator-settling-time-usstartup-delay-usno-mapalloc-rangeslinux,cma-defaultreusableio-channelsvf50-ts-min-pressurexp-gpiosxm-gpiosyp-gpiosym-gpios