L8I((H$mediatek,mt6795-evbmediatek,mt6795 +!7MediaTek MT6795 Evaluation Board =embeddedaliasesJ/soc/ovl@1400c000O/soc/ovl@1400d000T/soc/rdma@1400e000Z/soc/rdma@1400f000`/soc/rdma@14010000f/soc/wdma@14011000l/soc/wdma@14012000r/soc/color@14013000y/soc/color@14014000/soc/split@14018000/soc/split@14019000/soc/dpi@1401d000/soc/dsi@1401b000/soc/dsi@1401c000/soc/serial@11002000/soc/serial@11003000/soc/serial@11004000/soc/serial@11005000psci arm,psci-0.2smccpus+cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53psci @+8E@Wcpu@2cpuarm,cortex-a53psci @+8E@Wcpu@3cpuarm,cortex-a53psci @+8E@W cpu@100cpuarm,cortex-a53psci @+8E@W cpu@101cpuarm,cortex-a53psci @+8E@W cpu@102cpuarm,cortex-a53psci @+8E@W cpu@103cpuarm,cortex-a53psci @+8E@W cpu-mapcluster0core0dcore1dcore2dcore3d cluster1core0d core1d core2d core3d l2-cache0cacheh@-tl2-cache1cacheh@-toscillator-26m fixed-clockclk26moscillator-32k fixed-clock}clk32kdummy13m fixed-clock]@pmuarm,cortex-a53-pmu0    timerarm,armv8-timer 0   soc+ simple-bussyscon@10000000 mediatek,mt6795-topckgensysconsyscon@10001000 mediatek,mt6795-infracfgsysconsyscon@10003000mediatek,mt6795-pericfgsyscon0syscon@10006000sysconsimple-mfd`power-controller!mediatek,mt6795-power-controller+power-domain@1Rmmpower-domain@2RUmmvencpower-domain@3Rmmpower-domain@0Rmm power-domain@4Remmmjcpower-domain@5power-domain@6mfg+power-domain@7+power-domain@8 pinctrl@10005000mediatek,mt6795-pinctrl P baseeint'7COdwatchdog@10007000mediatek,mt6795-wdtp utimer@10008000,mediatek,mt6795-timermediatek,mt6577-timer pwrap@1000d000mediatek,mt6795-pwrappwrap pwrap c spiwrapintpol-controller@10200620.mediatek,mt6795-sysirqmediatek,mt6577-sysirqOd   timer@10200670mediatek,mt6795-systimer p @clk13miommu@10205000mediatek,mt6795-m4u Pbclk syscon@10209000"mediatek,mt6795-apmixedsyssyscon !clock-controller@10209f00mediatek,mt6795-fhctl  disabledmailbox@10212000(mediatek,mt6795-gcemediatek,mt8173-gce!  gcedsi-phy@10215000mediatek,mt8173-mipi-tx!P mipi_tx0_pll disableddsi-phy@10216000mediatek,mt8173-mipi-tx!` mipi_tx1_pll disabled interrupt-controller@10221000 arm,gic-400d O@"" "@ "`   cci@10390000 arm,cci-400+99slave-if@1000arm,cci-400-ctrl-if ace-liteslave-if@4000arm,cci-400-ctrl-iface@slave-if@5000arm,cci-400-ctrl-ifacePpmu@9000arm,cci-400-pmu,r1P<:;<=>serial@11002000*mediatek,mt6795-uartmediatek,mt6577-uart  [ baudbustxrxokayserial@11003000*mediatek,mt6795-uartmediatek,mt6577-uart0 \ baudbustxrx disableddma-controller@110003802mediatek,mt6795-uart-dmamediatek,mt6577-uart-dma`````````ghijklmn apdmaserial@11004000*mediatek,mt6795-uartmediatek,mt6577-uart@ ]  baudbustxrx disabledserial@11005000*mediatek,mt6795-uartmediatek,mt6577-uartP ^! baudbustxrx disabledpwm@11006000mediatek,mt6795-pwm`& MHS ,topmainpwm1pwm2pwm3pwm4pwm5pwm6pwm7 disabledi2c@11007000(mediatek,mt6795-i2cmediatek,mt8173-i2c pp T1  maindma+ disabledi2c@11008000(mediatek,mt6795-i2cmediatek,mt8173-i2c p U1  maindma+ disabledi2c@11009000(mediatek,mt6795-i2cmediatek,mt8173-i2c p V1  maindma+ disabledi2c@11010000(mediatek,mt6795-i2cmediatek,mt8173-i2c p W1  maindma+ disabledi2c@11011000(mediatek,mt6795-i2cmediatek,mt8173-i2c p X1  maindma+ disabledmmc@11230000mediatek,mt6795-mmc# O \]sourcehclksource_cg disabledmmc@11240000mediatek,mt6795-mmc$ PO sourcehclk disabledmmc@11250000mediatek,mt6795-mmc% QO sourcehclk disabledmmc@11260000mediatek,mt6795-mmc& RO sourcehclk disabledsyscon@14000000mediatek,mt6795-mmsyssyscon;RKׄ`govl@1400c0002mediatek,mt6795-disp-ovlmediatek,mt8173-disp-ovl govl@1400d0002mediatek,mt6795-disp-ovlmediatek,mt8173-disp-ovl grdma@1400e0004mediatek,mt6795-disp-rdmamediatek,mt8173-disp-rdma grdma@1400f0004mediatek,mt6795-disp-rdmamediatek,mt8173-disp-rdma grdma@140100004mediatek,mt6795-disp-rdmamediatek,mt8173-disp-rdma gwdma@140110004mediatek,mt6795-disp-wdmamediatek,mt8173-disp-wdma gwdma@140120004mediatek,mt6795-disp-wdmamediatek,mt8173-disp-wdma  g color@140130006mediatek,mt6795-disp-colormediatek,mt8173-disp-color0 g0color@140140006mediatek,mt6795-disp-colormediatek,mt8173-disp-color@ g@aal@140150002mediatek,mt6795-disp-aalmediatek,mt8173-disp-aalP gPgamma@140160006mediatek,mt6795-disp-gammamediatek,mt8173-disp-gamma` g`merge@140170006mediatek,mt6795-disp-mergemediatek,mt8173-disp-mergepsplit@140180006mediatek,mt6795-disp-splitmediatek,mt8173-disp-splitsplit@140190006mediatek,mt6795-disp-splitmediatek,mt8173-disp-splitufoe@1401a0004mediatek,mt6795-disp-ufoemediatek,mt8173-disp-ufoe gdsi@1401b000(mediatek,mt6795-dsimediatek,mt8173-dsi $%enginedigitalhsdphy disableddsi@1401c000(mediatek,mt6795-dsimediatek,mt8173-dsi &' enginedigitalhs dphy disableddpi@1401d000(mediatek,mt6795-dpimediatek,mt8183-dpi ()!pixelenginepll disabledpwm@1401e0002mediatek,mt6795-disp-pwmmediatek,mt8173-disp-pwm&! mainmm disabledpwm@1401f0002mediatek,mt6795-disp-pwmmediatek,mt8173-disp-pwm&#"mainmm disabledmutex@14020000mediatek,mt8173-disp-mutex 45glarb@14021000mediatek,mt6795-smi-larbapbsmi"smi@14022000mediatek,mt6795-smi-common apbsmi"od@140230000mediatek,mt6795-disp-odmediatek,mt8173-disp-od0g0larb@15001000mediatek,mt6795-smi-larbapbsmi"clock-controller@16000000mediatek,mt6795-vdecsys#larb@16010000mediatek,mt6795-smi-larb"##apbsmiclock-controller@18000000mediatek,mt6795-vencsys$larb@18001000mediatek,mt6795-smi-larb$$apbsmi"memory@40000000memory@chosenserial0:921600n8 compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl1rdma0rdma1rdma2wdma0wdma1color0color1split0split1dpi0dsi0dsi1serial0serial1serial2serial3methoddevice_typeenable-methodregcci-control-portnext-level-cachephandlei-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setscpucache-levelcache-unified#clock-cellsclock-frequencyclock-output-namesinterruptsinterrupt-affinityranges#reset-cells#power-domain-cellsclocksclock-namesmediatek,infracfgreg-namesgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellstimeout-secresetsreset-namesmediatek,larbspower-domains#iommu-cellsstatus#mbox-cells#phy-cellsinterface-typedmasdma-namesdma-requestsmediatek,dma-33bits#dma-cells#pwm-cellsclock-divassigned-clocksassigned-clock-ratesmboxesmediatek,gce-client-regiommusphysphy-namesmediatek,gce-eventsmediatek,smimediatek,larb-idstdout-path