ך8P( J ',radxa,cm3-ioradxa,cm3rockchip,rk3566%7Radxa Compute Module 3(CM3) IO Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/ethernet@fe010000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci%9D cpu@100cpu,arm,cortex-a55psci%9D cpu@200cpu,arm,cortex-a55psci%9D cpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2D@opp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24mDxin32k ,fixed-clock=Mxin32k` jdefaultsram@10f000 ,mmio-sram xsram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkotg utmi_wideokay usb2-phy high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  &A0(;Dusb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usb disabledusb@fd880000 ,generic-ehci usb disabledusb@fd8c0000 ,generic-ohci usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdD[io-domains&,rockchip,rk3568-pmu-io-voltage-domainokayJXftsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucruDclock-controller@fdd20000,rockchip,rk3568-cruxin24m G Di2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk`jdefault okayregulator@1c ,tcs,tcs4525;vdd_cpuJ^p 45 Dregulator-state-mempmic@20,rockchip,rk817 Mrk817-clkout1rk817-clkout2!jdefault`"   , 8 D P DregulatorsDCDC_REG1 ;vdd_logicJ^\p pqregulator-state-mems DCDC_REG2 ;vdd_gpu_npuJ^\p pqDAregulator-state-memDCDC_REG3;vcc_ddrJ^\regulator-state-memsDCDC_REG4 ;vcc3v3_sysJ^\p2Z2ZDregulator-state-mems2ZLDO_REG1 ;vcca1v8_pmuJ^pw@w@regulator-state-memsw@LDO_REG2 ;vdda_0v9J^p  Dregulator-state-memLDO_REG3 ;vdda0v9_pmuJ^p  regulator-state-mems LDO_REG4 ;vccio_acodecJ^p2Z2ZDregulator-state-memLDO_REG5 ;vccio_sdJ^pw@2ZDregulator-state-memLDO_REG6 ;vcc3v3_pmuJ^p2Z2ZDregulator-state-mems2ZLDO_REG7 ;vcc_1v8_pJ^pw@w@Dregulator-state-memLDO_REG8 ;vcc1v8_dvpJ^pw@w@regulator-state-memLDO_REG9 ;vcc2v8_dvpJ^p**regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk##`$jdefault disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`%jdefault disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`&jdefault disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk`'jdefault disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk`(jdefault disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller Dpower-domain@7)power-domain@8 *+,power-domain@9  -./power-domain@10 012345power-domain@11 6power-domain@13 7power-domain@14 89:power-domain@15;<=>?gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus%@okayADvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclkB iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface  DBrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Zaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkC iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface  DCmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sample%0рreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth>DN_ErFokay GsY@inputHrgmiijdefault`IJKLMN O N F.mdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22DHstmmac-axi-configDDrx-queues-config&DEqueue0tx-queues-config<DFqueue0vop@fe040000 0@Rvopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2P okay,rockchip,rk3566-vopports Dport@0 endpoint@2\QDYport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface okayDPdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyR apb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyS apb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefjdefault `TUV lokay}WXDports port@0endpoint\YDQport@1endpoint\ZDqos@fe128000,rockchip,rk3568-qossyscon D)qos@fe138080,rockchip,rk3568-qossyscon D8qos@fe138100,rockchip,rk3568-qossyscon D9qos@fe138180,rockchip,rk3568-qossyscon D:qos@fe148000,rockchip,rk3568-qossyscon D*qos@fe148080,rockchip,rk3568-qossyscon D+qos@fe148100,rockchip,rk3568-qossyscon D,qos@fe150000,rockchip,rk3568-qossyscon D6qos@fe158000,rockchip,rk3568-qossyscon D0qos@fe158100,rockchip,rk3568-qossyscon D1qos@fe158180,rockchip,rk3568-qossyscon D2qos@fe158200,rockchip,rk3568-qossyscon D3qos@fe158280,rockchip,rk3568-qossyscon D4qos@fe158300,rockchip,rk3568-qossyscon D5qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D;qos@fe190280,rockchip,rk3568-qossyscon D<qos@fe190300,rockchip,rk3568-qossyscon D=qos@fe190380,rockchip,rk3568-qossyscon D>qos@fe190400,rockchip,rk3568-qossyscon D?qos@fe198000,rockchip,rk3568-qossyscon D7qos@fe1a8000,rockchip,rk3568-qossyscon D-qos@fe1a8080,rockchip,rk3568-qossyscon D.qos@fe1a8100,rockchip,rk3568-qossyscon D/dfi@fe230000,rockchip,rk3568-dfi#  [pcie@fe260000,rockchip,rk3568-pcie0@&Rdbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`\\\\ pcie-phyTx @@pipe  disabledlegacy-interrupt-controller HD\mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sample%0рresetokay%/AR]jdefault`]^_`ammc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sample%0рresetokay %RAjwbjdefault `cde]wifi@1,brcm,bcm43455-fmacf host-wakejdefault`gspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc`hjdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}corebusaxiblocktimerokay%0 jdefault`ijkl]i2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9mclk_txmclk_rxhclkmtxPQ tx-mrx-ml disabledDi2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:mclk_txmclk_rxhclkmmrxtxRS tx-mrx-mjdefault0`nopqrstuvwxyl disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;mclk_txmclk_rxhclkmmtxrxTtx-mjdefault`z{|}l disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkmmtxrxUV tx-mrx-ml disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkm rx`~jdefaultXpdm-ml disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\mtxjdefault`l disableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclkD#dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclkDmi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk`jdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk`jdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk`jdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk`jdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk`jdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk##txrxjdefault `  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk##txrxjdefault `  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk##txrxjdefault `  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk##txrxjdefault `  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk## `jdefaultokaybluetooth,brcm,bcm4345c5lpo f  f  !fjdefault ` - 9serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk##`jdefaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk##`jdefault disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk## `jdefault disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk# # `jdefault disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk# # `jdefault disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk##`jdefault disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk##`jdefault disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk##`jdefault disabledthermal-zonescpu-thermal Fd \ jtripscpu_alert0 zp passiveDcpu_alert1 z$ passivecpu_crit zs  criticalcooling-mapsmap0 0 gpu-thermal F \ jtripsgpu-threshold zp passivegpu-target z$ passiveDgpu-crit zs  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `tsadcapb_pclk sjinitdefaultsleep`   okay  Dsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclk saradc-apb okay *pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclk`jdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclk`jdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclk`jdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclk`jdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclk`jdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclk`jdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe" 6 H ^okayDphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe% 6 H ^ disabledDphy@fe870000,rockchip,rk3568-csi-dphyypclk ^apb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz ^ apb disabledDRmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ ^ apb disabledDSusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy0_480m  iokayDhost-port ^okay yDotg-port ^okayDusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy1_480m  iokayhost-port ^okayDotg-port ^okayDpinctrl,rockchip,rk3568-pinctrl[ xDgpio@fdd60000,rockchip,gpio-bank !.    D!gpio@fe740000,rockchip,gpio-bankt "cd   gpio@fe750000,rockchip,gpio-banku #ef  @  Dfgpio@fe760000,rockchip,gpio-bankv $gh  `  Dgpio@fe770000,rockchip,gpio-bankw %ij   DOpcfg-pull-up Dpcfg-pull-none Dpcfg-pull-none-drv-level-1  Dpcfg-pull-none-drv-level-2  Dpcfg-pull-none-drv-level-3  Dpcfg-pull-none-drv-level-15  Dpcfg-pull-up-drv-level-1  Dpcfg-pull-up-drv-level-2  Dpcfg-pull-none-smt  Dacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 D cpuebcedpdpemmcemmc-bus8   Diemmc-clk Djemmc-cmd Dkemmc-datastrobe Dleth0eth1flashfspifspi-pins` Dhgmac0gmac1gmac1m0-miim DIgmac1m0-clkinout DNgmac1m0-rx-bus20    DKgmac1m0-tx-bus20  DJgmac1m0-rgmii-clk DLgmac1m0-rgmii-bus@ DMgpuhdmitxhdmitxm0-cec DVhdmitx-scl DThdmitx-sda DUi2c0i2c0-xfer  Di2c1i2c1-xfer  Di2c2i2c2m0-xfer Di2c3i2c3m0-xfer Di2c4i2c4m0-xfer   Di2c5i2c5m0-xfer   Di2s1i2s1m0-lrckrx Dqi2s1m0-lrcktx Dpi2s1m0-sclkrx Doi2s1m0-sclktx Dni2s1m0-sdi0  Dri2s1m0-sdi1  Dsi2s1m0-sdi2  Dti2s1m0-sdi3 Dui2s1m0-sdo0 Dvi2s1m0-sdo1 Dwi2s1m0-sdo2  Dxi2s1m0-sdo3  Dyi2s2i2s2m0-lrcktx D{i2s2m0-sclktx Dzi2s2m0-sdi D|i2s2m0-sdo D}i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk D~pdmm0-clk1 Dpdmm0-sdi0  Dpdmm0-sdi1  Dpdmm0-sdi2  Dpdmm0-sdi3 Dpmicpmic-int-l D"pmupwm0pwm0m0-pins D%pwm1pwm1m0-pins D&pwm2pwm2m0-pins D'pwm3pwm3-pins D(pwm4pwm4-pins Dpwm5pwm5-pins Dpwm6pwm6-pins Dpwm7pwm7-pins Dpwm8pwm8m0-pins  Dpwm9pwm9m0-pins  Dpwm10pwm10m0-pins  Dpwm11pwm11m0-pins Dpwm12pwm12m0-pins Dpwm13pwm13m0-pins Dpwm14pwm14m0-pins Dpwm15pwm15m0-pins Drefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ D]sdmmc0-clk D^sdmmc0-cmd D_sdmmc0-det D`sdmmc0-pwren Dasdmmc1sdmmc1-bus4@ Dcsdmmc1-clk Ddsdmmc1-cmd Desdmmc2spdifspdifm0-tx Dspi0spi0m0-pins0 Dspi0m0-cs0 Dspi0m0-cs1 Dspi1spi1m0-pins0  Dspi1m0-cs0 Dspi1m0-cs1 Dspi2spi2m0-pins0 Dspi2m0-cs0 Dspi2m0-cs1 Dspi3spi3m0-pins0   Dspi3m0-cs0 Dspi3m0-cs1 Dtsadctsadc-shutorg Dtsadc-pin Duart0uart0-xfer D$uart1uart1m0-xfer   Duart1m0-ctsn Duart1m0-rtsn  Duart2uart2m0-xfer Duart3uart3m0-xfer Duart4uart4m0-xfer Duart5uart5m0-xfer Duart6uart6m0-xfer Duart7uart7m0-xfer Duart8uart8m0-xfer Duart9uart9m0-xfer Dvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-host-wake-h  Dbt-reg-on-h Dbt-wake-host-h  Dledsuser-led2 Dpi-nled-activity Dwifiwifi-reg-on-h Dwifi-host-wake-h Dgsdcardsdmmc-pwren usbvcc5v0-host-en-h Dleds ,gpio-ledsled-0 !  status timer onjdefault`led-1 O  activity heartbeatjdefault`vcc-sys-regulator,regulator-fixed;vcc_sysJ^pLK@LK@D vcc-1v8-regulator,regulator-fixed;vcc_1v8J^pw@w@Dvcc-3v3-regulator,regulator-fixed;vcc_3v3J^p2Z2ZDvcca-1v8-regulator,regulator-fixed ;vcca_1v8J^pw@w@Dpwrseq-sdio,mmc-pwrseq-simple ext_clockjdefault` !fDbchosen +serial2:1500000n8external-gmac1-clock ,fixed-clock=sY@ Mgmac1_clkinDGhdmi-con,hdmi-connectoraportendpoint\DZvcc5v0-usb30-regulator,regulator-fixed ;vcc5v0_usb30 7 jdefault`JpLK@LK@ Dvcca1v8-image-regulator,regulator-fixed;vcca1v8_imageJ^pw@w@DXvdda0v9-image-regulator,regulator-fixed;vcca0v9_imageJ^p  DW interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0ethernet0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaysnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplymmc-hs200-1_8vdma-namesarm,pl330-periph-burst#dma-cellsdevice-wakeup-gpioshost-wakeup-gpiosreset-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinscolorfunctionlinux,default-triggerdefault-statestdout-pathenable-active-high