8( -radxa,rockpi4aradxa,rockpi4rockchip,rk3399 +7Radxa ROCK Pi 4Aaliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/ethernet@fe300000/mmc@fe330000/mmc@fe320000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid) 9 D Xcpu@1cpuarm,cortex-a53pscid) 9 D Xcpu@2cpuarm,cortex-a53pscid) 9 D Xcpu@3cpuarm,cortex-a53pscid) 9 D Xcpu@100cpuarm,cortex-a72psci ) 9 DXthermal-idle`'lcpu@101cpuarm,cortex-a72psci ) 9 DXthermal-idle`'lidle-states|pscicpu-sleeparm,idle-statexlX cluster-sleeparm,idle-statelX display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clock*n6:xin24mMXpcie@f8000000rockchip,rk3399-pcie Zaxi-baseapb-basepci+du Gaclkaclk-perfhclkpm0123syslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokay default'7Ginterrupt-controllerWdXpcie-ep@f8000000rockchip,rk3399-pcie-ep Zapb-basemem-base Gaclkaclk-perfhclkpml8(coremgmtmgmt-stickypipepmpclkaclk ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3z default disabledethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmacethokayinput rgmiidefault! " ,'PA(Jmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@Sр Mbiuciuciu-driveciu-sampleayreset disabled+l*v#default $%&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@ASр  Lbiuciuciu-driveciu-sampleazresetokayl 'default()*+mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13  N Nclk_xinclk_ahb:emmc_cardclockM, phy_arasan"okaySрl3Xusb@fe380000 generic-ehci8-.usbokayusb@fe3a0000 generic-ohci:-.usbokayusb@fe3c0000 generic-ehci</0usbokayusb@fe3e0000 generic-ohci> /0usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendBhost12usb2-phyusb3-phy Jutmi_wideSkokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspendBhost34usb2-phyusb3-phy Jutmi_wideSkokaydp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf56 HJspdifdptxapbcore disabledportsport+endpoint@07Xendpoint@18Xinterrupt-controller@fee00000 arm,gic-v3d+WP  Xmsi-controller@fee20000arm,gic-v3-its Xppi-partitionsinterrupt-partition-0#Xinterrupt-partition-1#Xsaradc@ff100000rockchip,rk3399-saradc>,Pesaradcapb_pclk saradc-apbokay>crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default9+okayJ,acodec@11everest,es8316Ymclkportendpoint:Xi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default;+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default<+okayJaXi2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default=+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default>+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default?+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcydefault @AB disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbydefaultC disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdydefaultDokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeydefaultE disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDF F txrxdefaultGHIJ+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5F F txrxdefaultKLMN+okayflash@0jedec,spi-norspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4FFtxrxdefaultOPQR+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCFFtxrxdefaultSTUV+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkWW txrxdefaultXYZ[+ disabledthermal-zonescpu-thermald\tripscpu_alert0ppassiveX]cpu_alert1$passiveX^cpu_crits criticalcooling-mapsmap0]map1^Hgpu-thermald\tripsgpu_alert0$passiveX_gpu_crits criticalcooling-mapsmap0_ `tsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbsinitdefaultsleepa'b1a;okayQhX\qos@ffa58000rockchip,rk3399-qossyscon Xjqos@ffa5c000rockchip,rk3399-qossyscon Xkqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Xnqos@ffa70080rockchip,rk3399-qossyscon Xoqos@ffa74000rockchip,rk3399-qossyscon@ Xlqos@ffa76000rockchip,rk3399-qossyscon` Xmqos@ffa90000rockchip,rk3399-qossyscon Xpqos@ffa98000rockchip,rk3399-qossyscon Xcqos@ffaa0000rockchip,rk3399-qossyscon Xqqos@ffaa0080rockchip,rk3399-qossyscon Xrqos@ffaa8000rockchip,rk3399-qossyscon Xsqos@ffaa8080rockchip,rk3399-qossyscon Xtqos@ffab0000rockchip,rk3399-qossyscon Xdqos@ffab0080rockchip,rk3399-qossyscon Xeqos@ffab8000rockchip,rk3399-qossyscon Xfqos@ffac0000rockchip,rk3399-qossyscon Xgqos@ffac0080rockchip,rk3399-qossyscon Xhqos@ffac8000rockchip,rk3399-qossyscon Xuqos@ffac8080rockchip,rk3399-qossyscon Xvqos@ffad0000rockchip,rk3399-qossyscon Xwqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Xipower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+Xpower-domain@34"cpower-domain@33!depower-domain@31fpower-domain@32  ghpower-domain@35#ipower-domain@25lpower-domain@23jpower-domain@22fkpower-domain@27Llpower-domain@28mpower-domain@8~}power-domain@9 power-domain@24nopower-domain@15+power-domain@21rppower-domain@19qrpower-domain@20stpower-domain@16+power-domain@17uvpower-domain@18wsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Xio-domains&rockchip,rk3399-pmu-io-voltage-domainokayxspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5yyspiclkapb_pclk<defaultz{|}+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7yy"baudclkapb_pclkfydefault~ disabledi2c@ff3c0000rockchip,rk3399-i2c<y  y y i2cpclk9default+okay*Japmic@1brockchip,rk808 M:xin32krk808-clkout2default $0<IVcXregulatorsDCDC_REG1 pvdd_center qpqregulator-state-memDCDC_REG2 pvdd_cpu_l qpqX regulator-state-memDCDC_REG3pvcc_ddrregulator-state-mem DCDC_REG4pvcc_1v8w@w@Xregulator-state-mem  w@LDO_REG1pvcca1v8_codecw@w@Xregulator-state-memLDO_REG2 pvcca1v8_hdmiw@w@Xregulator-state-memLDO_REG3 pvcca_1v8w@w@regulator-state-mem  w@LDO_REG4 pvcc_sdio--Xregulator-state-mem  -LDO_REG5pvcca3v0_codec--regulator-state-memLDO_REG6pvcc_1v5``regulator-state-mem  `LDO_REG7 pvcca0v9_hdmi  Xregulator-state-memLDO_REG8pvcc_3v0--Xxregulator-state-mem  -SWITCH_REG1pvcc_camregulator-state-memSWITCH_REG2 pvcc_mipiregulator-state-memregulator@40silergy,syr827@ 7default pvdd_cpu_b 4` TX regulator-state-memregulator@41silergy,syr828A 7defaultpvdd_gpu 4` TXregulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=y  y y i2cpclk8default+okayJXai2c@ff3e0000rockchip,rk3399-i2c>y  y y i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB _defaulty disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB _defaulty disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  _defaultyokayXpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 _defaulty disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monXvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu aclkhclk jiommu@ff650800rockchip,iommue@s aclkiface qXvideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore j iommu@ff660480rockchip,iommu f@f@u aclkiface  qXiommu@ff670800rockchip,iommug@* aclkiface q disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  ~  apb_pclkXWdma-controller@ff6e0000arm,pl330arm,primecelln@  ~  apb_pclkXFclock-controller@ff750000rockchip,rk3399-pmucruuxin24mM y(JXyclock-controller@ff760000rockchip,rk3399-cruvxin24mM @BCxD#g/;рxh<4`#Fׄׄ ׄXsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+Xio-domains"rockchip,rk3399-io-voltage-domainokay  x x mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf  disabledXusb2phy@e450rockchip,rk3399-usb2phyP{phyclkM:clk_usbphy0_480mokayX-host-port  linestateokayX.otg-port 0ghjotg-bvalidotg-idlinestateokayX1usb2phy@e460rockchip,rk3399-usb2phy`|phyclkM:clk_usbphy1_480mokayX/host-port  linestateokayX0otg-port 0lmootg-bvalidotg-idlinestateokayX3phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okayX,pcie-phyrockchip,rk3399-pcie-phyrefclk phyokayXphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphyokaydp-port X5usb3-port X2phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphyokaydp-port X6usb3-port X4watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBWtx mclkhclkUdefault disabledportXendpointXi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'WWtxrxi2s_clki2s_hclkVbclk_onbclk_off'okay  portXendpoint 8i2s CX:i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(WWtxrxi2s_clki2s_hclkWdefault disabled  i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)WWtxrxi2s_clki2s_hclkXokayXvop@ff8f0000rockchip,rk3399-vop-lit wׄaclk_vopdclk_vophclk_vop j axiahbdclkokayport+Xendpoint@0Xendpoint@1Xendpoint@2Xendpoint@3Xendpoint@4X8iommu@ff8f3f00rockchip,iommu?w aclkiface qokayXvop@ff900000rockchip,rk3399-vop-big vׄaclk_vopdclk_vophclk_vop j axiahbdclkokayport+Xendpoint@0Xendpoint@1Xendpoint@2Xendpoint@3Xendpoint@4X7iommu@ff903f00rockchip,iommu?v aclkiface qokayXisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk jdphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface q KXisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk jdphy disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface q KXhdmi-soundsimple-audio-card fi2s  hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfrefokay   defaultXports+port@0+endpoint@0Xendpoint@1Xport@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0Xendpoint@1Xport@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+  disabledXports+port@0+endpoint@0Xendpoint@1Xport@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0Xendpoint@1Xport@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu P#okay DX`pinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankry  WdX'gpio@ff730000rockchip,gpio-banksy  WdXgpio@ff780000rockchip,gpio-bankxP  WdXgpio@ff788000rockchip,gpio-bankxQ  WdX"gpio@ff790000rockchip,gpio-bankyR  WdXpcfg-pull-up Xpcfg-pull-down Xpcfg-pull-none *Xpcfg-pull-none-12ma * 7 Xpcfg-pull-none-13ma * 7 Xpcfg-pull-none-18ma * 7pcfg-pull-none-20ma * 7Xpcfg-pull-up-2ma  7pcfg-pull-up-8ma  7pcfg-pull-up-18ma  7pcfg-pull-up-20ma  7Xpcfg-pull-down-4ma  7pcfg-pull-down-8ma  7pcfg-pull-down-12ma  7 pcfg-pull-down-18ma  7pcfg-pull-down-20ma  7pcfg-output-high Fpcfg-output-low Rpcfg-input-enable ]pcfg-input-pull-up ] pcfg-input-pull-down ] clockclk-32k jcifcif-clkin j cif-clkouta j edpedp-hpd jXgmacrgmii-pins j    X!rmii-pins j     i2c0i2c0-xfer jXi2c1i2c1-xfer jX9i2c2i2c2-xfer jX;i2c3i2c3-xfer jX<i2c4i2c4-xfer j  Xi2c5i2c5-xfer j  X=i2c6i2c6-xfer j  X>i2c7i2c7-xfer jX?i2c8i2c8-xfer jXi2s0i2s0-2ch-bus` jXi2s0-2ch-bus-bclk-off` jXi2s0-8ch-bus ji2s0-8ch-bus-bclk-off ji2s1i2s1-2ch-busP jXi2s1-2ch-bus-bclk-offP jsdio0sdio0-bus1 jsdio0-bus4@ jX$sdio0-cmd jX%sdio0-clk jX&sdio0-cd jsdio0-pwr jsdio0-bkpwr jsdio0-wp jsdio0-int jsdmmcsdmmc-bus1 jsdmmc-bus4@ j   X+sdmmc-clk j X(sdmmc-cmd j X*sdmmc-cd jX)sdmmc-wp jsuspendap-pwroff jddrio-pwroff jspdifspdif-bus jXspdif-bus-1 jspi0spi0-clk jXGspi0-cs0 jXJspi0-cs1 jspi0-tx jXHspi0-rx jXIspi1spi1-clk j XKspi1-cs0 j XNspi1-rx jXMspi1-tx jXLspi2spi2-clk j XOspi2-cs0 j XRspi2-rx j XQspi2-tx j XPspi3spi3-clk jXzspi3-cs0 jX}spi3-rx jX|spi3-tx jX{spi4spi4-clk jXSspi4-cs0 jXVspi4-rx jXUspi4-tx jXTspi5spi5-clk jXXspi5-cs0 jX[spi5-rx jXZspi5-tx jXYtestclktest-clkout0 jtest-clkout1 jtest-clkout2 jtsadcotp-pin jXaotp-out jXbuart0uart0-xfer jX@uart0-cts jXAuart0-rts jXBuart1uart1-xfer j  XCuart2auart2a-xfer j uart2buart2b-xfer juart2cuart2c-xfer jXDuart3uart3-xfer jXEuart3-cts juart3-rts juart4uart4-xfer jX~uarthdcpuarthdcp-xfer jpwm0pwm0-pin jXpwm0-pin-pull-down jvop0-pwm-pin jvop1-pwm-pin jpwm1pwm1-pin jXpwm1-pin-pull-down jpwm2pwm2-pin jXpwm2-pin-pull-down jpwm3apwm3a-pin jXpwm3bpwm3b-pin jhdmihdmi-i2c-xfer jhdmi-cec jXpciepci-clkreqn-cpm jpci-clkreqnb-cpm jXpcie-pwr-en jXbtbt-enable-h j bt-host-wake-l jbt-wake-l jes8316hp-detect jhp-int jledsuser-led2 jXpmicpmic-int-l jXvsel1-pin jXvsel2-pin jXusb-typecvcc5v0-typec-en jXusb2vcc5v0-host-en jXwifiwifi-enable-h j Xwifi-host-wake-l jchosen xserial2:1500000n8external-gmac-clock fixed-clock*sY@ :clkin_gmacMXleds gpio-ledsdefaultled-0 status  " heartbeatsdio-pwrseqmmc-pwrseq-simplelpodefault ' X#soundaudio-graph-card Analog sound-ditaudio-graph-card SPDIF spdif-ditlinux,spdif-ditportendpointXvbus-typec-regulatorregulator-fixed  default pvbus_typec Tdc-12vregulator-fixed pvcc12v_dcinXvcc3v3-lan-regulatorregulator-fixed pvcc3v3_lan2Z2Z TX vcc3v3-pcie-regulatorregulator-fixed  default pvcc3v3_pcie TXvcc3v3-sysregulator-fixed pvcc3v3_sys2Z2Z TXvcc5v0-host-regulatorregulator-fixed  default pvcc5v0_host TXvcc-sysregulator-fixed pvcc5v0_sysLK@LK@ TXvcc-0v9regulator-fixedpvcc_0v9   TXvdd-logpwm-regulator a pvdd_log 5\opp-table-0operating-points-v2 X opp00 Q  @opp01 #F opp02 0, P Popp03 < HHopp04 G B@B@opp05 Tfr **opp-table-1operating-points-v2 Xopp00 Q  @opp01 #F opp02 0, opp03 < Y Yopp04 G ~~opp05 Tfr opp06 _" opp07 kI OOopp-table-2operating-points-v2Xopp00  0opp01 @ 0opp02 ׄ 0opp03 e Y Y0opp04 #F HH0opp05 / 0 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statescpu-supplyoperating-points-v2phandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,capture-channelsrockchip,playback-channelsdai-formatmclk-fsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiavdd-0v9-supplyavdd-1v8-supplyddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathfunctioncolorlinux,default-triggerreset-gpioslabeldaisenable-active-highpwmspwm-supplyopp-sharedopp-hzopp-microvoltclock-latency-ns