nU8gP(grockchip,r88rockchip,rk3368 + 7Rockchip R88aliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/ethernet@ff290000/mmc@ff0d0000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53psciarm-pmuarm,armv8-pmuv3`pqrstuvw  psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockn6%xin24m8Dmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Eр S  D r vZbiuciuciu-driveciu-samplef q xreset disabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @Eр S  E s wZbiuciuciu-driveciu-samplef !q xresetokay E   default  !-mmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@Eр S  G u yZbiuciuciu-driveciu-samplef #q xresetokay: default saradc@ff100000rockchip,saradc $LS I [Zsaradcapb_pclkq W xsaradc-apbokay^spi@ff110000(rockchip,rk3368-spirockchip,rk3066-spiS A RZspiclkapb_pclk , default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spiS B SZspiclkapb_pclk - default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spiS C TZspiclkapb_pclk ) default !+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+Zi2cS N default" disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+Zi2cS O default# disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+Zi2cS P default$ disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+Zi2cS Q default% disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartn6S M UZbaudclkapb_pclk 7jt disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartn6S N VZbaudclkapb_pclk 8jt disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartn6S P XZbaudclkapb_pclk :jt disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartn6S Q YZbaudclkapb_pclk ;jt disableddma-controller@ff250000arm,pl330arm,primecell%@S  Zapb_pclkthermal-zonescpu-thermald&tripscpu_alert0$passive'cpu_alert18passive(cpu_crits criticalcooling-mapsmap0 '0map1 (0 gpu-thermald&tripsgpu_alert08passive)gpu_crit8 criticalcooling-mapsmap0 )0tsadc@ff280000rockchip,rk3368-tsadc( %S H ZZtsadcapb_pclkq  xtsadc-apb initdefaultsleep*+'*1Gsokay^u&ethernet@ff290000rockchip,rk3368-gmac) macirq,8S  f g c ]MZstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macokay-rmiioutput .  'B@ default/ 0usb@ff500000 generic-ehciP S okayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X S Zotghost#5D@@ okaydma-controller@ff600000arm,pl330arm,primecell`@S  Zapb_pclkEi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ceS LZi2c < default0+okaysyr827@40silergy,syr827@Spvdd_cpu, 4`@1rtc@51haoyu,hym8563Q8%xin32kUi2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+Zi2cS M default2 disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmh default3S _ disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmh default4S _ disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh S _ disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0 default5S _ disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uartiS O WZbaudclkapb_pclk 9 default6jtokaymbox@ff6b0000rockchip,rk3368-mailboxk0S E Zpclk_mailbox disabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdspower-controller!rockchip,rk3368-power-controller(+Hpower-domain@12 S       c h g n o r s f d d h i l k j n m$<789:;<=>?(power-domain@14 S  o p <@AB(power-domain@16S @<C(syscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdsIio-domains&rockchip,rk3368-pmu-io-voltage-domainokayCNreboot-modesyscon-reboot-modeY`RBlRBzRB RBclock-controller@ff760000rockchip,rk3368-cruvSDZxin24m,8 syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw,io-domains"rockchip,rk3368-io-voltage-domainokaywatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdtS p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  BS a U Zpclktimerspdif@ff880000rockchip,rk3368-spdif 6S S  ZmclkhclkEtx defaultF disabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (Zi2s_clki2s_hclkS T EEtxrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5Zi2s_clki2s_hclkS R EEtxrx defaultG disablediommu@ff900800rockchip,iommu S  ZaclkifaceH  disablediommu@ff914000rockchip,iommu @P S  ZaclkifaceH  disablediommu@ff930300rockchip,iommu S  ZaclkifaceH  disablediommu@ff9a0440rockchip,iommu @@@ S  Zaclkiface disablediommu@ff9a0800rockchip,iommu  S  Zaclkiface disabledqos@ffad0000rockchip,rk3368-qossyscon 7qos@ffad0080rockchip,rk3368-qossyscon 8qos@ffad0100rockchip,rk3368-qossyscon 9qos@ffad0180rockchip,rk3368-qossyscon :qos@ffad0200rockchip,rk3368-qossyscon ;qos@ffad0280rockchip,rk3368-qossyscon <qos@ffad0300rockchip,rk3368-qossyscon =qos@ffad0380rockchip,rk3368-qossyscon >qos@ffad0400rockchip,rk3368-qossyscon ?qos@ffae0000rockchip,rk3368-qossyscon @qos@ffae0100rockchip,rk3368-qossyscon Aqos@ffae0180rockchip,rk3368-qossyscon Bqos@ffaf0000rockchip,rk3368-qossyscon Cefuse@ffb00000rockchip,rk3368-efuse +S q Zpclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-4004@ @ `   pinctrlrockchip,rk3368-pinctrl,EI+Rgpio@ff750000rockchip,gpio-bankuS @ QYi4Rgpio@ff780000rockchip,gpio-bankxS A RYi4gpio@ff790000rockchip,gpio-bankyS B SYi4Pgpio@ff7a0000rockchip,gpio-bankzS C TYi4.pcfg-pull-upuLpcfg-pull-downpcfg-pull-noneMpcfg-pull-none-12ma Nemmcemmc-clkJemmc-cmdKemmc-pwrLemmc-bus1Lemmc-bus4@LLLLemmc-bus8KKKKKKKKemmc-resetMOgmacrgmii-pinsMMMN N NNN NMMMMMMrmii-pinsMMMN N NMMMM/i2c0i2c0-xfer MM0i2c1i2c1-xfer MM2i2c2i2c2-xfer  MM"i2c3i2c3-xfer MM#i2c4i2c4-xfer MM$i2c5i2c5-xfer MM%i2si2s-8ch-bus M MMMMMMMMGpwm0pwm0-pinM3pwm1pwm1-pinM4pwm3pwm3-pinM5sdio0sdio0-bus1Lsdio0-bus4@LLLLsdio0-cmdL sdio0-clkM sdio0-cdLsdio0-wpLsdio0-pwrLsdio0-bkpwrLsdio0-intLsdmmcsdmmc-clk Msdmmc-cmd Lsdmmc-cd Lsdmmc-bus1Lsdmmc-bus4@LLLLspdifspdif-txMFspi0spi0-clkLspi0-cs0Lspi0-cs1Lspi0-txLspi0-rxLspi1spi1-clkLspi1-cs0Lspi1-cs1Lspi1-rxLspi1-txLspi2spi2-clk Lspi2-cs0 L!spi2-rx L spi2-tx Ltsadcotp-pinM*otp-outM+uart0uart0-xfer LMuart0-ctsMuart0-rtsMuart1uart1-xfer LMuart1-ctsMuart1-rtsMuart2uart2-xfer LM6uart3uart3-xfer LMuart3-ctsMuart3-rtsMuart4uart4-xfer LMuart4-ctsMuart4-rtsMpcfg-pull-none-drv-8maJpcfg-pull-up-drv-8mauKirir-intLTkeyspwr-keyLQledsstby-pwren Mled-ctlMSsdiowifi-reg-onMWbt-rstMVusbhost-vbus-drvMXchosenserial2:115200n8memorymemory@emmc-pwrseqmmc-pwrseq-emmcO default Pgpio-keys gpio-keys defaultQkey-power R GPIO Powertgpio-leds gpio-ledsled-0 .r88:green:led defaultSir-receivergpio-ir-receiver . defaultTsdio-pwrseqmmc-pwrseq-simpleSU Zext_clock defaultVW.. vcc18-regulatorregulator-fixedpvcc_18w@w@1vcc-host-regulatorregulator-fixed R defaultX pvcc_host1vcc-io-regulatorregulator-fixedpvcc_io2Z2Z1vcc-lan-regulatorregulator-fixedpvcc_lan2Z2Z-vcc-sys-regulatorregulator-fixedpvcc_sysLK@LK@1vccio-wl-regulatorregulator-fixed pvccio_wl2Z2Zvdd-10-regulatorregulator-fixedpvdd_10B@B@1 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2ethernet0mmc0mmc1cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusassigned-clocksassigned-clock-parentsbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeed#io-channel-cellsvref-supplyreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cells#power-domain-cellspm_qospmu-supplyvop-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsaudio-supplygpio30-supplygpio1830-supplywifi-supplydmasdma-namespower-domains#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codeenable-active-high