k8d(d.rockchip,px5-evbrockchip,px5rockchip,rk3368 +7Rockchip PX5 EVBaliases=/pinctrl/gpio@ff750000C/pinctrl/gpio@ff780000I/pinctrl/gpio@ff790000O/pinctrl/gpio@ff7a0000U/i2c@ff650000Z/i2c@ff660000_/i2c@ff140000d/i2c@ff150000i/i2c@ff160000n/i2c@ff170000s/serial@ff180000{/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0c0000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53psciarm-pmuarm,armv8-pmuv3`pqrstuvw  psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clock n6xin24m.Fmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @;р I  D r vPbiuciuciu-driveciu-sample\ g nresetzokaydefault Z$mmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @;р I  E s wPbiuciuciu-driveciu-sample\ !g nreset zdisabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@;р I  G u yPbiuciuciu-driveciu-sample\ #g nresetzokay р1@Fdefault $saradc@ff100000rockchip,saradc $TI I [Psaradcapb_pclkg W nsaradc-apb zdisabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spiI A RPspiclkapb_pclk ,default+ zdisabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spiI B SPspiclkapb_pclk -default+ zdisabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spiI C TPspiclkapb_pclk )default !+ zdisabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+Pi2cI Ndefault"zokaytouchscreen@40silead,gsl1680@ # f#r i2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+Pi2cI Odefault$ zdisabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+Pi2cI Pdefault% zdisabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+Pi2cI Qdefault& zdisabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart n6I M UPbaudclkapb_pclk 7 zdisabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart n6I N VPbaudclkapb_pclk 8 zdisabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart n6I P XPbaudclkapb_pclk : zdisabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart n6I Q YPbaudclkapb_pclk ;zokaydma-controller@ff250000arm,pl330arm,primecell%@I  Papb_pclkthermal-zonescpu-thermald#'tripscpu_alert03$?passive(cpu_alert138?passive)cpu_crit3s? criticalcooling-mapsmap0J(0Omap1J)0O gpu-thermald#'tripsgpu_alert038?passive*gpu_crit38? criticalcooling-mapsmap0J*0Otsadc@ff280000rockchip,rk3368-tsadc( %I H ZPtsadcapb_pclkg  ntsadc-apbinitdefaultsleep+^,h+rszokay'ethernet@ff290000rockchip,rk3368-gmac) macirq-8I  f g c ]MPstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac zdisabledusb@ff500000 generic-ehciP I zokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X I Potgotg@@ zokaydma-controller@ff600000arm,pl330arm,primecell`@I  Papb_pclkGi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ceI LPi2c <default.+zokaypmic@1brockchip,rk808 /default01&G2S2_2k2w22222xin32krk808-clkout2.regulatorsDCDC_REG1 ` `$vdd_cpuDCDC_REG2 ` `$vdd_logDCDC_REG3$vcc_ddrDCDC_REG42Z 2Z$vcc_ioLDO_REG1w@ w@ $vcc18_flashLDO_REG22Z 2Z$vcca_33LDO_REG3B@ B@$vdd_10LDO_REG42Z 2Z$avdd_33LDO_REG5w@ 2Z $vccio_sdLDO_REG6B@ B@ $vdd10_lcdLDO_REG7w@ w@$vcc_18LDO_REG8w@ w@ $vcc18_lcdSWITCH_REG1$vcc_sdSWITCH_REG2 $vcc33_lcdi2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+Pi2cI Mdefault3zokayaccelerometer@18 bosch,bma250 4pwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmh3default5I _ zdisabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmh3default6I _ zdisabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh 3I _ zdisabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh03default7I _ zdisabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uartiI O WPbaudclkapb_pclk 9default8 zdisabledmbox@ff6b0000rockchip,rk3368-mailboxk0I E Ppclk_mailbox> zdisabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfdspower-controller!rockchip,rk3368-power-controllerJ+Jpower-domain@12 I       c h g n o r s f d d h i l k j n m$^9:;<=>?@AJpower-domain@14 I  o p ^BCDJpower-domain@16I @^EJsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfdsKio-domains&rockchip,rk3368-pmu-io-voltage-domain zdisabledreboot-modesyscon-reboot-modeelRBxRBRB RBclock-controller@ff760000rockchip,rk3368-cruvIFPxin24m-. syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw-io-domains"rockchip,rk3368-io-voltage-domain zdisabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdtI p Ozokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  BI a U Ppclktimerspdif@ff880000rockchip,rk3368-spdif 6I S  PmclkhclkGtxdefaultH zdisabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (Pi2s_clki2s_hclkI T GGtxrx zdisabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5Pi2s_clki2s_hclkI R GGtxrxdefaultI zdisablediommu@ff900800rockchip,iommu I  PaclkifaceJ  zdisablediommu@ff914000rockchip,iommu @P I  PaclkifaceJ  zdisablediommu@ff930300rockchip,iommu I  PaclkifaceJ  zdisablediommu@ff9a0440rockchip,iommu @@@ I  Paclkiface zdisablediommu@ff9a0800rockchip,iommu  I  Paclkiface zdisabledqos@ffad0000rockchip,rk3368-qossyscon 9qos@ffad0080rockchip,rk3368-qossyscon :qos@ffad0100rockchip,rk3368-qossyscon ;qos@ffad0180rockchip,rk3368-qossyscon <qos@ffad0200rockchip,rk3368-qossyscon =qos@ffad0280rockchip,rk3368-qossyscon >qos@ffad0300rockchip,rk3368-qossyscon ?qos@ffad0380rockchip,rk3368-qossyscon @qos@ffad0400rockchip,rk3368-qossyscon Aqos@ffae0000rockchip,rk3368-qossyscon Bqos@ffae0100rockchip,rk3368-qossyscon Cqos@ffae0180rockchip,rk3368-qossyscon Dqos@ffaf0000rockchip,rk3368-qossyscon Eefuse@ffb00000rockchip,rk3368-efuse +I q Ppclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400 @ @ `   pinctrlrockchip,rk3368-pinctrl-K+'gpio@ff750000rockchip,gpio-bankuI @ Q.> /gpio@ff780000rockchip,gpio-bankxI A R.> gpio@ff790000rockchip,gpio-bankyI B S.> 4gpio@ff7a0000rockchip,gpio-bankzI C T.> #pcfg-pull-upJMpcfg-pull-downWpcfg-pull-nonefLpcfg-pull-none-12mafs Nemmcemmc-clkLemmc-cmdMemmc-pwrMemmc-bus1Memmc-bus4@MMMMemmc-bus8MMMMMMMMgmacrgmii-pinsLLLN N NNN NLLLLLLrmii-pinsLLLN N NLLLLi2c0i2c0-xfer LL.i2c1i2c1-xfer LL3i2c2i2c2-xfer  LL"i2c3i2c3-xfer LL$i2c4i2c4-xfer LL%i2c5i2c5-xfer LL&i2si2s-8ch-bus L LLLLLLLLIpwm0pwm0-pinL5pwm1pwm1-pinL6pwm3pwm3-pinL7sdio0sdio0-bus1Msdio0-bus4@MMMMsdio0-cmdMsdio0-clkLsdio0-cdMsdio0-wpMsdio0-pwrMsdio0-bkpwrMsdio0-intMsdmmcsdmmc-clk L sdmmc-cmd M sdmmc-cd Msdmmc-bus1Msdmmc-bus4@MMMM spdifspdif-txLHspi0spi0-clkMspi0-cs0Mspi0-cs1Mspi0-txMspi0-rxMspi1spi1-clkMspi1-cs0Mspi1-cs1Mspi1-rxMspi1-txMspi2spi2-clk Mspi2-cs0 M!spi2-rx M spi2-tx Mtsadcotp-pinL+otp-outL,uart0uart0-xfer MLuart0-ctsLuart0-rtsLuart1uart1-xfer MLuart1-ctsLuart1-rtsLuart2uart2-xfer ML8uart3uart3-xfer MLuart3-ctsLuart3-rtsLuart4uart4-xfer MLuart4-ctsLuart4-rtsLkeyspwr-keyLOpmicpmic-sleepL1pmic-intM0chosenserial4:115200n8memory@0@memorygpio-keys gpio-keysdefaultOkey-power l/ GPIO Powertvcc-sys-regulatorregulator-fixed$vcc_sysLK@ LK@2 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delayno-sdiosd-uhs-sdr12sd-uhs-sdr25pinctrl-namespinctrl-0rockchip,default-sample-phasevmmc-supplyvqmmc-supplymmc-hs200-1_8vno-sdnon-removable#io-channel-cellspower-gpiostouchscreen-size-xtouchscreen-size-ysilead,max-fingersreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#mbox-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-namespower-domains#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathlabellinux,codewakeup-source