e8( radxa,rockpi-erockchip,rk3328 +7Radxa ROCK Pi Ealiases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/ethernet@ff550000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci"- cpu@1cpuarm,cortex-a53xpsci"- cpu@2cpuarm,cortex-a53xpsci"- cpu@3cpuarm,cortex-a53xpsci"- idle-states5pscicpu-sleeparm,idle-stateBSjx{-l2-cache0cache-opp-table-0operating-points-v2-opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2s &Analog=okaysimple-audio-card,cpuDsimple-audio-card,codecDarm-pmuarm,cortex-a53-pmu0NdefgY display-subsystemrockchip,display-subsysteml hdmi-soundsimple-audio-cardi2s &HDMI =disabledsimple-audio-card,cpuDsimple-audio-card,codecDpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0N   xin24m fixed-clockrn6xin24m-Di2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s N)7i2s_clki2s_hclk  txrx =disabled-i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s N*8i2s_clki2s_hclktxrx=okay-i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s N+9i2s_clki2s_hclktxrx =disabledspdif@ff030000rockchip,rk3328-spdif N.: mclkhclk txdefault =disabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep =disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd-8io-domains"rockchip,rk3328-io-voltage-domain=okay '5Cgpiorockchip,rk3328-grf-gpioQapower-controller!rockchip,rk3328-power-controllerm+-;power-domain@6mpower-domain@5 BABmpower-domain@8Fmreboot-modesyscon-reboot-modeRBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart N7&baudclkapb_pclktxrxdefault   =disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart N8'baudclkapb_pclktxrxdefault !"# =disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart N9(baudclkapb_pclktxrxdefault$=okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c N$+7 i2cpclkdefault% =disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c N%+8 i2cpclkdefault&=okaypmic@18rockchip,rk805 'Nrxin32krk805-clkout2Qadefault()))()4@)regulatorsDCDC_REG1Lvdd_log[o 4 0regulator-state-memB@DCDC_REG2Lvdd_arm[o 4 0-regulator-state-mem~DCDC_REG3Lvcc_ddr[oregulator-state-memDCDC_REG4Lvcc_io[o2Z2Z-regulator-state-mem2ZLDO_REG1Lvcc_18[ow@w@-9regulator-state-memw@LDO_REG2 Lvcc18_emmc[ow@w@-regulator-state-memw@LDO_REG3Lvdd_10[oB@B@regulator-state-memB@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c N&+9 i2cpclkdefault* =disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c N'+: i2cpclkdefault+ =disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi N1+ spiclkapb_pclk txrxdefault,-./ =disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt N(pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault0 =disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault1 =disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault2 =disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault3 =disableddma-controller@ff1f0000arm,pl330arm,primecell@N apb_pclk-thermal-zonessoc-thermal'=K]4tripstrip-point0mpypassivetrip-point1mLypassive-5soc-critmsy criticalcooling-mapsmap050 tsadc@ff250000rockchip,rk3328-tsadc% N:$P$tsadcapb_pclkinitdefaultsleep676B tsadc-apb8 =okay-4efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse! id@7cpu-leakage@17logic-leakage@19cpu-version@1a5-Eadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( NP:%saradcapb_pclkV saradc-apb=okayL9-egpu@ff300000"rockchip,rk3328-maliarm,mali-4500TNZW]XY[\"Xgpgpmmupppp0ppmmu0pp1ppmmu1 buscorefiommu@ff330200rockchip,iommu3 N` aclkifaceh =disablediommu@ff340800rockchip,iommu4@ NbF aclkifaceh =disabledvideo-codec@ff350000rockchip,rk3328-vpu5 N XvdpuF aclkhclku:|;iommu@ff350800rockchip,iommu5@ N F aclkifaceh|;-:video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6 N BABaxiahbcabaccoreAB ׄׄu<|;iommu@ff360480rockchip,iommu 6@6@ NJB aclkifaceh|;-<vop@ff370000rockchip,rk3328-vop7> N x;aclk_vopdclk_vophclk_vop axiahbdclku= =disabledport+- endpoint@0>-Ciommu@ff373f00rockchip,iommu7? N ; aclkifaceh =disabled-=hdmi@ff3c0000rockchip,rk3328-dw-hdmi<N#GFiahbisfrcec?hdmidefault @AB8 =disabled-ports+port@0endpointC->port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk8=okay-phy@ff430000rockchip,rk3328-hdmi-phyC NSDysysclkrefoclkrefpclk hdmi_phyrE cpu-version =disabled-?clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD8rx=&'(ABDC"\5H4$zDDD|n6n6n6n6#FLGрxhxhрxhxh-syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyDphyclk usb480m_phyr{F=okay-Fotg-port$N;<=Xotg-bvalidotg-idlinestate =disabled-Xhost-port N> Xlinestate=okay-Ymmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@ N  =!JNbiuciuciu-driveciu-sampleр=okay)defaultGHIJ4Kmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@ N  >"KObiuciuciu-driveciu-sampleр =disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@ N ?#LPbiuciuciu-driveciu-sampleр=okay@R_ndefault LMN4|ethernet@ff540000rockchip,rk3328-gmacT NXmacirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth8=okaydfOOinputPrgmiidefaultQ&mdiosnps,dwmac-mdio+ethernet-phy@1RSdefault TN'P $T-Pethernet@ff550000rockchip,rk3328-gmacU8 NXmacirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb stmmacethrmiiUoutput=okaymdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultVW0-Uusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X NMotgBotgJ\k@ X usb2-phy =disabledusb@ff5c0000 generic-ehci\ N NFYusb=okayusb@ff5d0000 generic-ohci] N NFYusb =disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3` NC`aref_clksuspend_clkbus_clkBhost zutmi_wide =okayinterrupt-controller@ff811000 arm,gic-400 1 B@ @ `  N -crypto@ff060000rockchip,rk3328-crypto@ NPQ;hclk_masterhclk_slavesclkD crypto-rstpinctrlrockchip,rk3328-pinctrl8+ Wgpio@ff210000rockchip,gpio-bank! N3Qa B 11 ^pin-15 [GPIO0_D3]-hgpio@ff220000rockchip,gpio-bank" N4Qa B 11 ^pin-07 [GPIO1_D4]-Tgpio@ff230000rockchip,gpio-bank# N5Qa B 1A ^pin-08 [GPIO2_A0]pin-10 [GPIO2_A1]pin-11 [GPIO2_A2]pin-13 [GPIO2-A3]pin-27 [GPIO2_A4]pin-28 [GPIO2_A5]pin-33 [GPIO2_A6]pin-26 [GPIO2_B4]pin-36 [GPIO2_B7]pin-32 [GPIO2_C0]pin-35 [GPIO2_C1]pin-12 [GPIO2_C2]pin-38 [GPIO2_C3]pin-29 [GPIO2_C4]pin-31 [GPIO2_C5]pin-37 [GPIO2_C6]pin-40 [GPIO2_C7]-'gpio@ff240000rockchip,gpio-bank$ N6Qa B 1 ^pin-23 [GPIO3_A0]pin-19 [GPIO3_A1]pin-21 [GPIO3_A2]pin-03 [GPIO3_A4]pin-05 [GPIO3_A6]pin-24 [GPIO3_B0]-gpcfg-pull-up n-\pcfg-pull-down {-dpcfg-pull-none -Zpcfg-pull-none-2ma  -cpcfg-pull-up-2ma n pcfg-pull-up-4ma n -]pcfg-pull-none-4ma  -`pcfg-pull-down-4ma { pcfg-pull-none-8ma  -^pcfg-pull-up-8ma n -_pcfg-pull-none-12ma  -apcfg-pull-up-12ma n -bpcfg-output-high pcfg-output-low pcfg-input-high n -[pcfg-input i2c0i2c0-xfer ZZ-%i2c1i2c1-xfer ZZ-&i2c2i2c2-xfer  ZZ-*i2c3i2c3-xfer ZZ-+i2c3-pins ZZhdmi_i2chdmii2c-xfer ZZ-Apdm-0pdmm0-clk Z-pdmm0-fsync Zpdmm0-sdi0 Z-pdmm0-sdi1 Z-pdmm0-sdi2 Z-pdmm0-sdi3 Z-pdmm0-clk-sleep [-pdmm0-sdi0-sleep [-pdmm0-sdi1-sleep [-pdmm0-sdi2-sleep [-pdmm0-sdi3-sleep [-pdmm0-fsync-sleep [tsadcotp-pin  Z-6otp-out  Z-7uart0uart0-xfer  Z\-uart0-cts  Z-uart0-rts  Z- uart0-rts-pin  Zuart1uart1-xfer Z\-!uart1-cts Z-"uart1-rts Z-#uart1-rts-pin Zuart2-0uart2m0-xfer Z\uart2-1uart2m1-xfer Z\-$spi0-0spi0m0-clk \spi0m0-cs0  \spi0m0-tx  \spi0m0-rx  \spi0m0-cs1  \spi0-1spi0m1-clk \spi0m1-cs0 \spi0m1-tx \spi0m1-rx \spi0m1-cs1 \spi0-2spi0m2-clk \-,spi0m2-cs0 \-/spi0m2-tx \--spi0m2-rx \-.i2s1i2s1-mclk Zi2s1-sclk Zi2s1-lrckrx Zi2s1-lrcktx Zi2s1-sdi Zi2s1-sdo Zi2s1-sdio1 Zi2s1-sdio2 Zi2s1-sdio3 Zi2s1-sleep [[[[[[[[[i2s2-0i2s2m0-mclk Zi2s2m0-sclk Zi2s2m0-lrckrx Zi2s2m0-lrcktx Zi2s2m0-sdi Zi2s2m0-sdo Zi2s2m0-sleep` [[[[[[i2s2-1i2s2m1-mclk Zi2s2m1-sclk Zi2sm1-lrckrx Zi2s2m1-lrcktx Zi2s2m1-sdi Zi2s2m1-sdo Zi2s2m1-sleepP [[[[[spdif-0spdifm0-tx Zspdif-1spdifm1-tx Zspdif-2spdifm2-tx Z-sdmmc0-0sdmmc0m0-pwren ]sdmmc0m0-pin ]sdmmc0-1sdmmc0m1-pwren ]sdmmc0m1-pin ]-isdmmc0sdmmc0-clk ^-Gsdmmc0-cmd _-Hsdmmc0-dectn ]-Isdmmc0-wrprt ]sdmmc0-bus1 _sdmmc0-bus4@ ____-Jsdmmc0-pins ]]]]]]]]sdmmc0extsdmmc0ext-clk `sdmmc0ext-cmd ]sdmmc0ext-wrprt ]sdmmc0ext-dectn ]sdmmc0ext-bus1 ]sdmmc0ext-bus4@ ]]]]sdmmc0ext-pins ]]]]]]]]sdmmc1sdmmc1-clk  ^sdmmc1-cmd  _sdmmc1-pwren _sdmmc1-wrprt _sdmmc1-dectn _sdmmc1-bus1 _sdmmc1-bus4@ ____sdmmc1-pins  ] ]]]]]]]]emmcemmc-clk a-Lemmc-cmd b-Memmc-pwren Zemmc-rstnout Zemmc-bus1 bemmc-bus4@ bbbbemmc-bus8 bbbbbbbb-Npwm0pwm0-pin Z-0pwm1pwm1-pin Z-1pwm2pwm2-pin Z-2pwmirpwmir-pin Z-3gmac-1rgmiim1-pins`  ^ ``^``` ` `^ ^``^^^ ^`^^^^-Qrmiim1-pins cacccc c ca a Z ZZZZZgmac2phyfephyled-speed10 Zfephyled-duplex Zfephyled-rxm1 Z-Vfephyled-txm1 Zfephyled-linkm1 Z-Wtsadc_pintsadc-int  Ztsadc-pin  Zhdmi_pinhdmi-cec Z-@hdmi-hpd d-Bcif-0dvp-d2d9-m0 ZZZZZ Z Z ZZZZZcif-1dvp-d2d9-m1 ZZZZZZZZZZZZephyeth-phy-int-pin d-Reth-phy-reset-pin d-Sledsled-pin Z-fpmicpmic-int-l \-(usb3usb30-host-drv Z-jwifiwifi-en Z-kchosen serial2:1500000n8adc-keys adc-keys e buttons button-recovery Recovery !h ,'external-gmac-clock fixed-clocksY@ gmac_clkinr-Oleds gpio-ledsfdefaultled-0 F *g Lheartbeatsdmmc-regulatorregulator-fixed bhdefaultiLvcc_sdo g-Kvcc-host-5v-regulatorregulator-fixed bgdefaultj r Lvcc_host_5v[o g)vcc-sysregulator-fixedLvcc_sys[oLK@LK@-)vcc-wifi-regulatorregulator-fixed bhdefaultk Lvcc_wifi[o g compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,efuse-sizebits#io-channel-cellsvref-supplyinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpvmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vnon-removablevqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplysnps,aalsnps,rxpbltx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltcolorlinux,default-triggergpiovin-supplyenable-active-high