/8$( ,friendlyarm,nanopi-r2c-plusrockchip,rk3328 +7FriendlyElec NanoPi R2C Plusaliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/usb@ff600000/device@2/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci"- cpu@1cpuarm,cortex-a53xpsci"- cpu@2cpuarm,cortex-a53xpsci"- cpu@3cpuarm,cortex-a53xpsci"- idle-states5pscicpu-sleeparm,idle-stateBSjx{-l2-cache0cache-opp-table-0operating-points-v2-opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2s &Analog =disabledsimple-audio-card,cpuDsimple-audio-card,codecDarm-pmuarm,cortex-a53-pmu0NdefgY display-subsystemrockchip,display-subsysteml  =disabledhdmi-soundsimple-audio-cardi2s &HDMI =disabledsimple-audio-card,cpuDsimple-audio-card,codecDpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0N   xin24m fixed-clockrn6xin24m-Ei2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s N)7i2s_clki2s_hclk  txrx =disabled-i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s N*8i2s_clki2s_hclktxrx =disabled-i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s N+9i2s_clki2s_hclktxrx =disabledspdif@ff030000rockchip,rk3328-spdif N.: mclkhclk txdefault =disabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep =disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd-:io-domains"rockchip,rk3328-io-voltage-domain=okay '5Cgpiorockchip,rk3328-grf-gpioQapower-controller!rockchip,rk3328-power-controllerm+-<power-domain@6mpower-domain@5 BABmpower-domain@8Fmreboot-modesyscon-reboot-modeRBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart N7&baudclkapb_pclktxrxdefault  !" =disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart N8'baudclkapb_pclktxrxdefault #$% =disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart N9(baudclkapb_pclktxrxdefault&=okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c N$+7 i2cpclkdefault' =disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c N%+8 i2cpclkdefault(=okaypmic@18rockchip,rk805 )Nrxin32krk805-clkout2Qa*default+++(+4@+regulatorsDCDC_REG1Lvdd_log[o 4 0regulator-state-memB@DCDC_REG2Lvdd_arm[o 4 0-regulator-state-mem~DCDC_REG3Lvcc_ddr[oregulator-state-memDCDC_REG4 Lvcc_io_33[o2Z2Z-regulator-state-mem2ZLDO_REG1Lvcc_18[ow@w@-regulator-state-memw@LDO_REG2 Lvcc18_emmc[ow@w@-regulator-state-memw@LDO_REG3Lvdd_10[oB@B@regulator-state-memB@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c N&+9 i2cpclkdefault, =disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c N'+: i2cpclkdefault- =disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi N1+ spiclkapb_pclk txrxdefault./01 =disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt N(pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault2 =disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault3 =disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault4=okaypwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault5 =disableddma-controller@ff1f0000arm,pl330arm,primecell@N apb_pclk-thermal-zonessoc-thermal'=K]6tripstrip-point0mpypassivetrip-point1mLypassive-7soc-critmsy criticalcooling-mapsmap070 tsadc@ff250000rockchip,rk3328-tsadc% N:$P$tsadcapb_pclkinitdefaultsleep898B tsadc-apb: =okay!8-6efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuseS id@7cpu-leakage@17logic-leakage@19cpu-version@1ag-Fadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( NPl%saradcapb_pclkV saradc-apb =disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TNZW]XY[\"~gpgpmmupppp0ppmmu0pp1ppmmu1 buscorefiommu@ff330200rockchip,iommu3 N` aclkiface =disablediommu@ff340800rockchip,iommu4@ NbF aclkiface =disabledvideo-codec@ff350000rockchip,rk3328-vpu5 N ~vdpuF aclkhclk;<iommu@ff350800rockchip,iommu5@ N F aclkiface<-;video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6 N BABaxiahbcabaccoreAB ׄׄ=<iommu@ff360480rockchip,iommu 6@6@ NJB aclkiface<-=vop@ff370000rockchip,rk3328-vop7> N x;aclk_vopdclk_vophclk_vop axiahbdclk> =disabledport+- endpoint@0?-Diommu@ff373f00rockchip,iommu7? N ; aclkiface =disabled->hdmi@ff3c0000rockchip,rk3328-dw-hdmi<N#GFiahbisfrcec@hdmidefault ABC: =disabled-ports+port@0endpointD-?port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk: =disabled-phy@ff430000rockchip,rk3328-hdmi-phyC NSEysysclkrefoclkrefpclk hdmi_phyrF cpu-version =disabled-@clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD:rx=&'(ABDC"\5H4$zEEE|n6n6n6n6#FLGрxhxhрxhxh-syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyEphyclk usb480m_phyr{G=okay-Gotg-port$N;<=~otg-bvalidotg-idlinestate=okay-Whost-port N> ~linestate=okay-Xmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@ N  =!JNbiuciuciu-driveciu-sample&р=okay4>OHIJKdefaultZgtLmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@ N  >"KObiuciuciu-driveciu-sample&р =disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@ N ?#LPbiuciuciu-driveciu-sample&р=okay4default MNOethernet@ff540000rockchip,rk3328-gmacT N~macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth:=okaydfPP inputQ#rgmii,Rdefault7@I"mdiosnps,dwmac-mdio+ethernet-phy@3ethernet-phy-ieee802.3-c22RsY@qSdefault'P )-Qethernet@ff550000rockchip,rk3328-gmacU: N~macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb stmmaceth#rmiiT output =disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultUV-Tusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X NMotghost  @ W usb2-phy=okayusb@ff5c0000 generic-ehci\ N NGXusb=okayusb@ff5d0000 generic-ohci] N NGXusb=okayusb@ff600000rockchip,rk3328-dwc3snps,dwc3` NC`aref_clksuspend_clkbus_clkhost "utmi_wide + L d   =okay+device@2 usbbda,8153interrupt-controller@ff811000 arm,gic-400  @ @ `  N -crypto@ff060000rockchip,rk3328-crypto@ NPQ;hclk_masterhclk_slavesclkD crypto-rstpinctrlrockchip,rk3328-pinctrl:+ gpio@ff210000rockchip,gpio-bank! N3Qa  -egpio@ff220000rockchip,gpio-bank" N4Qa  -)gpio@ff230000rockchip,gpio-bank# N5Qa  -igpio@ff240000rockchip,gpio-bank$ N6Qa  pcfg-pull-up -[pcfg-pull-down -cpcfg-pull-none "-Ypcfg-pull-none-2ma " /-bpcfg-pull-up-2ma  /pcfg-pull-up-4ma  /-\pcfg-pull-none-4ma " /-_pcfg-pull-down-4ma  /pcfg-pull-none-8ma " /-]pcfg-pull-up-8ma  /-^pcfg-pull-none-12ma " / -`pcfg-pull-up-12ma  / -apcfg-output-high >pcfg-output-low Jpcfg-input-high  U-Zpcfg-input Ui2c0i2c0-xfer bYY-'i2c1i2c1-xfer bYY-(i2c2i2c2-xfer b YY-,i2c3i2c3-xfer bYY--i2c3-pins bYYhdmi_i2chdmii2c-xfer bYY-Bpdm-0pdmm0-clk bY-pdmm0-fsync bYpdmm0-sdi0 bY-pdmm0-sdi1 bY-pdmm0-sdi2 bY-pdmm0-sdi3 bY-pdmm0-clk-sleep bZ-pdmm0-sdi0-sleep bZ-pdmm0-sdi1-sleep bZ-pdmm0-sdi2-sleep bZ-pdmm0-sdi3-sleep bZ-pdmm0-fsync-sleep bZtsadcotp-pin b Y-8otp-out b Y-9uart0uart0-xfer b Y[- uart0-cts b Y-!uart0-rts b Y-"uart0-rts-pin b Yuart1uart1-xfer bY[-#uart1-cts bY-$uart1-rts bY-%uart1-rts-pin bYuart2-0uart2m0-xfer bY[uart2-1uart2m1-xfer bY[-&spi0-0spi0m0-clk b[spi0m0-cs0 b [spi0m0-tx b [spi0m0-rx b [spi0m0-cs1 b [spi0-1spi0m1-clk b[spi0m1-cs0 b[spi0m1-tx b[spi0m1-rx b[spi0m1-cs1 b[spi0-2spi0m2-clk b[-.spi0m2-cs0 b[-1spi0m2-tx b[-/spi0m2-rx b[-0i2s1i2s1-mclk bYi2s1-sclk bYi2s1-lrckrx bYi2s1-lrcktx bYi2s1-sdi bYi2s1-sdo bYi2s1-sdio1 bYi2s1-sdio2 bYi2s1-sdio3 bYi2s1-sleep bZZZZZZZZZi2s2-0i2s2m0-mclk bYi2s2m0-sclk bYi2s2m0-lrckrx bYi2s2m0-lrcktx bYi2s2m0-sdi bYi2s2m0-sdo bYi2s2m0-sleep` bZZZZZZi2s2-1i2s2m1-mclk bYi2s2m1-sclk bYi2sm1-lrckrx bYi2s2m1-lrcktx bYi2s2m1-sdi bYi2s2m1-sdo bYi2s2m1-sleepP bZZZZZspdif-0spdifm0-tx bYspdif-1spdifm1-tx bYspdif-2spdifm2-tx bY-sdmmc0-0sdmmc0m0-pwren b\sdmmc0m0-pin b\sdmmc0-1sdmmc0m1-pwren b\sdmmc0m1-pin b\-ksdmmc0sdmmc0-clk b]-Hsdmmc0-cmd b^-Isdmmc0-dectn b\-Jsdmmc0-wrprt b\sdmmc0-bus1 b^sdmmc0-bus4@ b^^^^-Ksdmmc0-pins b\\\\\\\\sdmmc0extsdmmc0ext-clk b_sdmmc0ext-cmd b\sdmmc0ext-wrprt b\sdmmc0ext-dectn b\sdmmc0ext-bus1 b\sdmmc0ext-bus4@ b\\\\sdmmc0ext-pins b\\\\\\\\sdmmc1sdmmc1-clk b ]sdmmc1-cmd b ^sdmmc1-pwren b^sdmmc1-wrprt b^sdmmc1-dectn b^sdmmc1-bus1 b^sdmmc1-bus4@ b^^^^sdmmc1-pins b \ \\\\\\\\emmcemmc-clk b`-Memmc-cmd ba-Nemmc-pwren bYemmc-rstnout bYemmc-bus1 baemmc-bus4@ baaaaemmc-bus8 baaaaaaaa-Opwm0pwm0-pin bY-2pwm1pwm1-pin bY-3pwm2pwm2-pin bY-4pwmirpwmir-pin bY-5gmac-1rgmiim1-pins` b ] __]___ _ _] ]__]]] ]_]]]]-Rrmiim1-pins bb`bbbb b b` ` Y YYYYYgmac2phyfephyled-speed10 bYfephyled-duplex bYfephyled-rxm1 bY-Ufephyled-txm1 bYfephyled-linkm1 bY-Vtsadc_pintsadc-int b Ytsadc-pin b Yhdmi_pinhdmi-cec bY-Ahdmi-hpd bc-Ccif-0dvp-d2d9-m0 bYYYYY Y Y YYYYYcif-1dvp-d2d9-m1 bYYYYYYYYYYYYbuttonreset-button-pin bY-dgmac2ioeth-phy-reset-pin bc-Sledslan-led-pin bY-fsys-led-pin bY-gwan-led-pin bY-hlanlan-vdd-pin bY-lpmicpmic-int-l b[-*sdsdio-vcc-pin b[-jchosen pserial2:1500000n8gmac-clock fixed-clocksY@ gmac_clkinr-Pkeys gpio-keysddefaultkey-reset |reset e  2leds gpio-leds fghdefaultled-0 i |nanopi-r2s:green:lanled-1 e |nanopi-r2s:red:sys onled-2 i |nanopi-r2s:green:wansdmmcio-regulatorregulator-gpio  )jdefault Lvcc_io_sdio[w@2Z  voltage w@2Z -sdmmc-regulatorregulator-fixed ekdefaultLvcc_sdo2Z2Z -Lvdd-5vregulator-fixedLvdd_5v[oLK@LK@-+vdd-5v-lanregulator-fixed  ildefault Lvdd_5v_lan[o + compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vnon-removabletx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplyrx_delaysnps,aaltx_delaymotorcomm,clk-out-frequency-hzmotorcomm,keep-pll-enabledmotorcomm,auto-sleep-disabledreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathlabellinux,codedebounce-intervaldefault-stateenable-active-highregulator-settling-time-usregulator-typestartup-delay-usvin-supplygpio