8(  anbernic,rg351vrockchip,rk3326 +7Anbernic RG351Valiases=/i2c@ff180000B/i2c@ff190000G/i2c@ff1a0000L/i2c@ff1b0000Q/serial@ff030000Y/serial@ff158000a/serial@ff160000i/serial@ff168000q/serial@ff170000y/serial@ff178000/spi@ff1d0000/spi@ff1d8000/mmc@ff370000cpus+cpu@0cpuarm,cortex-a35psciZ cpu@1cpuarm,cortex-a35psciZ cpu@2cpuarm,cortex-a35psciZ cpu@3cpuarm,cortex-a35psciZ idle-statespscicpu-sleeparm,idle-state"3Jx[k cluster-sleeparm,idle-state"3J[k opp-table-0operating-points-v2| opp-600000000#F ~~p@opp-8160000000, p@opp-1008000000< p@opp-1200000000G   p@opp-1296000000M?d ppp@arm-pmuarm,cortex-a35-pmu0defg display-subsystemrockchip,display-subsystem okayexternal-gmac-clock fixed-clock gmac_clkinpsci arm,psci-1.0smctimerarm,armv8-timer0   thermal-zonessoc-thermal*8J tripstrip-point-0Zpfpassivetrip-point-1ZLfpassive soc-critZ8f criticalcooling-mapsmap0q  vgpu-thermald*J tripsgpu-thresholdZpfpassivegpu-targetZLfpassive gpu-critZ8f criticalcooling-mapsmap0q vxin24m fixed-clockn6xin24m lpower-management@ff000000$rockchip,px30-pmusysconsimple-mfdpower-controllerrockchip,px30-power-controller+ npower-domain@5<power-domain@7;power-domain@9  C@?power-domain@10 @978:power-domain@11 Kpower-domain@12 XD56power-domain@13 (3 !"power-domain@14I#syscon@ff010000'rockchip,px30-pmugrfsysconsimple-mfd+ io-domains$rockchip,px30-pmu-io-voltage-domainokay$$reboot-modesyscon-reboot-modeRBRB RBRBRBserial@ff030000$rockchip,px30-uartsnps,dw-apb-uart %%baudclkapb_pclk &&%txrx/9Fdefault T'() disabledi2s@ff060000rockchip,px30-i2s-tdm  mclk_txmclk_rxhclk &&%txrx^*k rtx-mrx-mFdefault0T+,-./0123456~ disabledi2s@ff070000&rockchip,px30-i2srockchip,rk3066-i2s  i2s_clki2s_hclk &&%txrxFdefaultT789:~okay i2s@ff080000&rockchip,px30-i2srockchip,rk3066-i2s i2s_clki2s_hclk &&%txrxFdefaultT;<=>~ disabledinterrupt-controller@ff131000 arm,gic-400@ @ `    syscon@ff140000$rockchip,px30-grfsysconsimple-mfd+ *io-domains rockchip,px30-io-voltage-domainokay??@@@@lvdsrockchip,px30-lvds Adphy^*lvds disabledports+port@0+endpoint@0(B port@1serial@ff158000$rockchip,px30-uartsnps,dw-apb-uart Ibaudclkapb_pclk &&%txrx/9Fdefault TCDE disabledserial@ff160000$rockchip,px30-uartsnps,dw-apb-uart Jbaudclkapb_pclk &&%txrx/9FdefaultTFokayserial@ff168000$rockchip,px30-uartsnps,dw-apb-uart Kbaudclkapb_pclk &&%txrx/9Fdefault TGHI disabledserial@ff170000$rockchip,px30-uartsnps,dw-apb-uart Lbaudclkapb_pclk && %txrx/9Fdefault TJKL disabledserial@ff178000$rockchip,px30-uartsnps,dw-apb-uart Mbaudclkapb_pclk & & %txrx/9Fdefault TMNO disabledi2c@ff180000&rockchip,px30-i2crockchip,rk3399-i2cN i2cpclk FdefaultTP+okay8Ppmic@20rockchip,rk817 mclkrk808-clkout1xin32k Q TRSFdefault~guTTTTTTTT regulatorsDCDC_REG10~ +vdd_logic:q regulator-state-memOg~DCDC_REG2p~+vdd_arm:q regulator-state-memg~DCDC_REG3+vcc_ddrregulator-state-memODCDC_REG42Z2Z+vcc_3v3 @regulator-state-memg2ZLDO_REG2w@w@+vcc_1v8 kregulator-state-memOgw@LDO_REG3B@B@+vdd_1v0regulator-state-memOgB@LDO_REG42Z2Z +vcc3v3_pmu $regulator-state-memOg2ZLDO_REG5w@w@ +vccio_sd ?regulator-state-memOg2ZLDO_REG6-w@+vcc_sd wregulator-state-memOg2ZLDO_REG72Z2Z+vcc_bl regulator-state-memg2ZLDO_REG8**+vcc_lcd regulator-state-memg*LDO_REG92Z2Z +vcc_wifiregulator-state-memg2ZBOOSTReLK@ +usb_miducodeci2c@ff190000&rockchip,px30-i2crockchip,rk3399-i2cO i2cpclk FdefaultTU+ disabledi2c@ff1a0000&rockchip,px30-i2crockchip,rk3399-i2cP i2cpclk  FdefaultTV+ disabledi2c@ff1b0000&rockchip,px30-i2crockchip,rk3399-i2c Q i2cpclk  FdefaultTW+ disabledspi@ff1d0000&rockchip,px30-spirockchip,rk3066-spi $Uspiclkapb_pclk & & %txrxFdefaultTXYZ[+ disabledspi@ff1d8000&rockchip,px30-spirockchip,rk3066-spi %Vspiclkapb_pclk &&%txrxFdefaultT\]^_`+ disabledwatchdog@ff1e0000rockchip,px30-wdtsnps,dw-wdt[ % disabledpwm@ff200000&rockchip,px30-pwmrockchip,rk3328-pwm "S pwmpclkFdefaultTaokay pwm@ff200010&rockchip,px30-pwmrockchip,rk3328-pwm "S pwmpclkFdefaultTbokay pwm@ff200020&rockchip,px30-pwmrockchip,rk3328-pwm "S pwmpclkFdefaultTc disabledpwm@ff200030&rockchip,px30-pwmrockchip,rk3328-pwm 0"S pwmpclkFdefaultTd disabledpwm@ff208000&rockchip,px30-pwmrockchip,rk3328-pwm #T pwmpclkFdefaultTe disabledpwm@ff208010&rockchip,px30-pwmrockchip,rk3328-pwm #T pwmpclkFdefaultTf disabledpwm@ff208020&rockchip,px30-pwmrockchip,rk3328-pwm #T pwmpclkFdefaultTg disabledpwm@ff208030&rockchip,px30-pwmrockchip,rk3328-pwm 0#T pwmpclkFdefaultTh disabledtimer@ff210000*rockchip,px30-timerrockchip,rk3288-timer! Y& pclktimerdma-controller@ff240000arm,pl330arm,primecell$@ apb_pclk &tsadc@ff280000rockchip,px30-tsadc( $,P,Xtsadcapb_pclkk rtsadc-apb^*FinitdefaultsleepTi)j3i=okay saradc@ff288000,rockchip,px30-saradcrockchip,rk3399-saradc( TS-Wsaradcapb_pclkk rsaradc-apbokayeknvmem@ff290000rockchip,px30-otp)@/Zaotpapb_pclkphykrphy+id@7cpu-leakage@17performance@1eqclock-controller@ff2b0000rockchip,px30-cru+ l% xin24mgpll^*v8@IFq рр  clock-controller@ff2bc000rockchip,px30-pmucru+lxin24m^*v%%% G %syscon@ff2c0000,rockchip,px30-usb2phy-grfsysconsimple-mfd,+usb2phy@100rockchip,px30-usb2phy % phyclkm usb480m_phyokay mhost-port D linestateokay potg-port$BA@otg-bvalidotg-idlinestate disabled ophy@ff2e0000rockchip,px30-dsi-dphy.% E refpclkk>rapbn okay Aphy@ff2f0000rockchip,px30-csi-dphy/@Fpclkn k/rapb^* disabled usb@ff3000000rockchip,px30-usbrockchip,rk3066-usbsnps,dwc20 >otgotg@  o usb2-phynokayusb@ff340000 generic-ehci4 < pusbn disabledusb@ff350000 generic-ohci5 = pusbn disabledethernet@ff360000rockchip,px30-gmac6 +macirq@>??@ACL[stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speed^*rmiiFdefaultTqrn k^ rstmmaceth disabledmmc@ff370000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc7@ 6 ;CDbiuciuciu-driveciu-sampleрFdefaultTstuvnokay'8 JQS`mzw?mmc@ff380000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc8@ 7 8EFbiuciuciu-driveciu-sampleрFdefault Txyzn  disabledmmc@ff390000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc9@ 5 9GHbiuciuciu-driveciu-sampleрFdefault T{|}n  disabledspi@ff3a0000 rockchip,sfc:@ 8:clk_sfchclk_sfc T~Fdefaultn okay+flash@0jedec,spi-noronand-controller@ff3b0000rockchip,px30-nfc;@ 97ahbnfc7рFdefault Tn  disabledopp-table-1operating-points-v2 opp-200000000 ~opp-300000000opp-400000000ׄopp-4800000008*gpu@ff400000$rockchip,px30-maliarm,mali-bifrost@@$/.- jobmmugpuInokay video-codec@ff442000rockchip,px30-vpuD PO vepuvdpu aclkhclkn iommu@ff442800rockchip,iommuD( Q aclkifacen  dsi@ff450000(rockchip,px30-mipi-dsisnps,dw-mipi-dsiE KDpclk Adphyn k=rapb^*+okayports+port@0+endpoint@0( port@1endpoint( panel@0 (anbernic,rg351v-panelnewvision,nv3051d portendpoint( vop@ff460000rockchip,px30-vop-bigF Maclk_vopdclk_vophclk_vopk345 raxiahbdclkn okayport+ endpoint@0( endpoint@1( Biommu@ff460f00rockchip,iommuF M aclkifacen okay isp@ff4a0000rockchip,px30-cif-ispJ$FIJ ispmimipi 3_ispaclkhclkpclk dphyn  disabledports+port@0+iommu@ff4a8000rockchip,iommuJ F aclkifacen  qos@ff518000rockchip,px30-qossysconQ  qos@ff520000rockchip,px30-qossysconR  #qos@ff52c000rockchip,px30-qossysconR  qos@ff538000rockchip,px30-qossysconS  qos@ff538080rockchip,px30-qossysconS  qos@ff538100rockchip,px30-qossysconS  qos@ff538180rockchip,px30-qossysconS  qos@ff540000rockchip,px30-qossysconT  qos@ff540080rockchip,px30-qossysconT  qos@ff548000rockchip,px30-qossysconT  qos@ff548080rockchip,px30-qossysconT  qos@ff548100rockchip,px30-qossysconT  qos@ff548180rockchip,px30-qossysconT  !qos@ff548200rockchip,px30-qossysconT  "qos@ff550000rockchip,px30-qossysconU  qos@ff550080rockchip,px30-qossysconU  qos@ff550100rockchip,px30-qossysconU  qos@ff550180rockchip,px30-qossysconU  qos@ff558000rockchip,px30-qossysconU  qos@ff558080rockchip,px30-qossysconU  pinctrlrockchip,px30-pinctrl^*1+>gpio@ff040000rockchip,gpio-bank %EU Qgpio@ff250000rockchip,gpio-bank% \EUgpio@ff260000rockchip,gpio-bank& ]EU gpio@ff270000rockchip,gpio-bank' ^EU pcfg-pull-upa pcfg-pull-downn pcfg-pull-none} pcfg-pull-none-2ma}pcfg-pull-up-2maapcfg-pull-up-4maa pcfg-pull-none-4ma}pcfg-pull-down-4manpcfg-pull-none-8ma} pcfg-pull-up-8maa pcfg-pull-none-12ma}  pcfg-pull-up-12maa  pcfg-pull-none-smt} pcfg-output-highpcfg-output-low pcfg-input-higha pcfg-inputi2c0i2c0-xfer   Pi2c1i2c1-xfer  Ui2c2i2c2-xfer  Vi2c3i2c3-xfer    Wtsadctsadc-otp-pin itsadc-otp-out juart0uart0-xfer    'uart0-cts  (uart0-rts  )uart1uart1-xfer  Cuart1-cts Duart1-rts Euart2-m0uart2m0-xfer uart2-m1uart2m1-xfer   Fuart3-m0uart3m0-xfer uart3m0-ctsuart3m0-rtsuart3-m1uart3m1-xfer  Guart3m1-cts  Huart3m1-rts  Iuart4uart4-xfer  Juart4-cts Kuart4-rts Luart5uart5-xfer  Muart5-cts Nuart5-rts Ospi0spi0-clk Xspi0-csn Yspi0-miso  Zspi0-mosi  [spi0-clk-hsspi0-miso-hs spi0-mosi-hs spi1spi1-clk \spi1-csn0  ]spi1-csn1  ^spi1-miso _spi1-mosi  `spi1-clk-hsspi1-miso-hsspi1-mosi-hs pdmpdm-clk0m0pdm-clk0m1pdm-clk1pdm-sdi0m0pdm-sdi0m1pdm-sdi1pdm-sdi2pdm-sdi3pdm-clk0m0-sleeppdm-clk0m1-sleeppdm-clk1-sleeppdm-sdi0m0-sleeppdm-sdi0m1-sleeppdm-sdi1-sleeppdm-sdi2-sleeppdm-sdi3-sleepi2s0i2s0-8ch-mclki2s0-8ch-sclktx +i2s0-8ch-sclkrx  ,i2s0-8ch-lrcktx -i2s0-8ch-lrckrx  .i2s0-8ch-sdo0 /i2s0-8ch-sdo1 1i2s0-8ch-sdo2 3i2s0-8ch-sdo3 5i2s0-8ch-sdi0 0i2s0-8ch-sdi1  2i2s0-8ch-sdi2  4i2s0-8ch-sdi3 6i2s1i2s1-2ch-mclk Si2s1-2ch-sclk 7i2s1-2ch-lrck 8i2s1-2ch-sdi 9i2s1-2ch-sdo :i2s2i2s2-2ch-mclki2s2-2ch-sclk ;i2s2-2ch-lrck <i2s2-2ch-sdi =i2s2-2ch-sdo >sdmmcsdmmc-clk ssdmmc-cmd tsdmmc-det usdmmc-bus1sdmmc-bus4@ vsdiosdio-clk zsdio-cmd ysdio-bus4@ xemmcemmc-clk  {emmc-cmd  |emmc-rstnout emmc-bus1emmc-bus4@emmc-bus8 }flashflash-cs0 flash-rdy  flash-dqs  flash-ale  flash-cle  flash-wrn  flash-cslflash-rdn flash-bus8 sfcsfc-bus4@sfc-bus2  sfc-cs0 sfc-clk  ~lcdclcdc-rgb-dclk-pinlcdc-rgb-m0-hsync-pinlcdc-rgb-m0-vsync-pinlcdc-rgb-m0-den-pinlcdc-rgb888-m0-data-pins     lcdc-rgb666-m0-data-pins      lcdc-rgb565-m0-data-pins     lcdc-rgb888-m1-data-pins   lcdc-rgb666-m1-data-pins   lcdc-rgb565-m1-data-pins   pwm0pwm0-pin apwm1pwm1-pin bpwm2pwm2-pin  cpwm3pwm3-pin dpwm4pwm4-pin epwm5pwm5-pin fpwm6pwm6-pin gpwm7pwm7-pin hgmacrmii-pins  qmac-refclk-12ma  rmac-refclk cif-m0cif-clkout-m0 dvp-d2d9-m0   dvp-d0d1-m0  d10-d11-m0 cif-m1cif-clkout-m1dvp-d2d9-m1  dvp-d0d1-m1 d10-d11-m1 ispisp-prelightheadphonehp-detledsled-pin  pmicdc-det pmic-int  Rsoc_slppin_gpiosoc_slppin_rstsoc_slppin_slpchosenserial2:115200n8backlightpwm-backlighta gpio-leds gpio-ledsFdefaultTled-0 M  chargingrk817-soundsimple-audio-card rk817_int $i2s = [9 uMicrophoneMic JackHeadphoneHeadphonesSpeakerSpeaker; MICLMic JackHeadphonesHPOLHeadphonesHPORSpeakerSPKOsimple-audio-card,codec simple-audio-card,cpu vccsysregulator-fixed +vcc3v8_sys99 Tvibrator pwm-vibratorB@ enablegpio-keys-vol gpio-keys button-vol-down M VOLUMEDOWN rbutton-vol-up M VOLUMEUP s compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0rockchip,grfresetsreset-names#sound-dai-cells#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyphysphy-namesrockchip,outputremote-endpointi2c-scl-falling-time-nsi2c-scl-rising-time-nswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendrockchip,mic-in-differentialnum-cs#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modebus-widthfifo-depthmax-frequencycap-sd-highspeedcard-detect-delaycd-gpiossd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplyspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmali-supplyiommus#iommu-cellsbacklightreset-gpiosvdd-supplyrockchip,disable-mmu-resetrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathpower-supplypwmscolorfunctionsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,widgetssimple-audio-card,routingsound-daipwm-namesautorepeatlabellinux,code