8( iXRcompulab,omap3-sbc-t3730compulab,omap3-cm-t3730ti,omap3630ti,omap36xxti,omap3 +!7CompuLab SBC-T3730 with CM-T3730chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000l/dvi-connectoru/svideo-connectorcpus+cpu@0arm,cortex-a8~cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus +  pinmux@30 ti,omap3-padconfpinctrl-single08+ -B`}defaultpinmux_uart3_pinsnppinmux_mmc1_pins0pinmux_green_led_pinspinmux_dss_dpi_pins_commonpinmux_dss_dpi_pins_cm_t35x0pinmux_ads7846_pinspinmux_mcspi1_pins pinmux_i2c1_pinspinmux_mcbsp2_pins  pinmux_smsc1_pinsj pinmux_hsusb0_pins`rtvxz|~pinmux_twl4030_pinsApinmux_mmc2_pins0(*,.02pinmux_wl12xx_gpio4%pinmux_smsc2_pins pinmux_tfp410_pins'pinmux_i2c3_pinspinmux_sb_t35_audio_amp+pinmux_sb_t35_usb_hub_pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock h mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock  mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ -B`pinmux_twl4030_vpins pinmux_dss_dpi_pins_cm_t37300 target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `L revsyscsyss  .ick+ H ` aes1@0 ti,omap3-aesP;  @txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PL revsyscsyss  .ick+ H P aes2@0 ti,omap3-aesP;AB@txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockJYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockZpe#sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock|dpll3_m2x2_ckfixed-factor-clock |"dpll4_x2_ckfixed-factor-clock!|corex2_fckfixed-factor-clock"|$wkup_l4_ickfixed-factor-clock#|Scorex2_d3_fckfixed-factor-clock$|corex2_d5_fckfixed-factor-clock$|clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockJomap_32k_fck fixed-clockJEvirt_12m_ck fixed-clockJvirt_13m_ck fixed-clockJ]@virt_19200000_ck fixed-clockJ$virt_26000000_ck fixed-clockJvirt_38_4m_ck fixed-clockJIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!Z? He%dpll4_m2x2_mul_ckfixed-factor-clock%|&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock& 'omap_96m_alwon_fckfixed-factor-clock'|.dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0dpll3_m3_ck@1140ti,divider-clockZ@e(dpll3_m3x2_mul_ckfixed-factor-clock(|)dpll3_m3x2_ck@d00ti,hsdiv-gate-clock)  *emu_core_alwon_ckfixed-factor-clock*|gsys_altclk fixed-clockJ3mcbsp_clks fixed-clockJ dpll3_m2_ck@d40ti,divider-clockZ @e core_ckfixed-factor-clock |+dpll1_fck@940ti,divider-clock+Z @e,dpll1_ck@904ti,omap3-dpll-clock#,  $ @ 4dpll1_x2_ckfixed-factor-clock|-dpll1_x2m2_ck@944ti,divider-clock-Z DeAcm_96m_fckfixed-factor-clock.|/omap_96m_fck@d40 ti,mux-clock/# @Jdpll4_m3_ck@e40ti,divider-clock!Z @e0dpll4_m3x2_mul_ckfixed-factor-clock0|1dpll4_m3x2_ck@d00ti,hsdiv-gate-clock1 2omap_54m_fck@d40 ti,mux-clock23 @=cm_96m_d2_fckfixed-factor-clock/|4omap_48m_fck@d40 ti,mux-clock43 @5omap_12m_fckfixed-factor-clock5|Ldpll4_m4_ck@e40ti,divider-clock!Z@e6dpll4_m4x2_mul_ckti,fixed-factor-clock67dpll4_m4x2_ck@d00ti,gate-clock7 dpll4_m5_ck@f40ti,divider-clock!Z?@e8dpll4_m5x2_mul_ckti,fixed-factor-clock89dpll4_m5x2_ck@d00ti,hsdiv-gate-clock9 odpll4_m6_ck@1140ti,divider-clock!Z?@e:dpll4_m6x2_mul_ckfixed-factor-clock:|;dpll4_m6x2_ck@d00ti,hsdiv-gate-clock; <emu_per_alwon_ckfixed-factor-clock<|hclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock+ p>clkout2_src_mux_ck@d70ti,composite-mux-clock+#/= p?clkout2_src_ckti,composite-clock>?@sys_clkout2@d70ti,divider-clock@Z@ pmpu_ckfixed-factor-clockA|Barm_fck@924ti,divider-clockB $Zemu_mpu_alwon_ckfixed-factor-clockB|il3_ick@a40ti,divider-clock+Z @eCl4_ick@a40ti,divider-clockCZ @eDrm_ick@c40ti,divider-clockDZ @egpt10_gate_fck@a00ti,composite-gate-clock#  Fgpt10_mux_fck@a40ti,composite-mux-clockE# @Ggpt10_fckti,composite-clockFGgpt11_gate_fck@a00ti,composite-gate-clock#  Hgpt11_mux_fck@a40ti,composite-mux-clockE# @Igpt11_fckti,composite-clockHIcore_96m_fckfixed-factor-clockJ|mmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock    mcbsp1_gate_fck@a00ti,composite-gate-clock    core_48m_fckfixed-factor-clock5|Kmcspi4_fck@a00ti,wait-gate-clockK mcspi3_fck@a00ti,wait-gate-clockK mcspi2_fck@a00ti,wait-gate-clockK mcspi1_fck@a00ti,wait-gate-clockK uart2_fck@a00ti,wait-gate-clockK uart1_fck@a00ti,wait-gate-clockK  core_12m_fckfixed-factor-clockL|Mhdq_fck@a00ti,wait-gate-clockM core_l3_ickfixed-factor-clockC|Nsdrc_ick@a10ti,wait-gate-clockN gpmc_fckfixed-factor-clockN|core_l4_ickfixed-factor-clockD|Ommchs2_ick@a10ti,omap3-interface-clockO mmchs1_ick@a10ti,omap3-interface-clockO hdq_ick@a10ti,omap3-interface-clockO mcspi4_ick@a10ti,omap3-interface-clockO mcspi3_ick@a10ti,omap3-interface-clockO mcspi2_ick@a10ti,omap3-interface-clockO mcspi1_ick@a10ti,omap3-interface-clockO i2c3_ick@a10ti,omap3-interface-clockO i2c2_ick@a10ti,omap3-interface-clockO i2c1_ick@a10ti,omap3-interface-clockO uart2_ick@a10ti,omap3-interface-clockO uart1_ick@a10ti,omap3-interface-clockO  gpt11_ick@a10ti,omap3-interface-clockO  gpt10_ick@a10ti,omap3-interface-clockO  mcbsp5_ick@a10ti,omap3-interface-clockO  mcbsp1_ick@a10ti,omap3-interface-clockO  omapctrl_ick@a10ti,omap3-interface-clockO dss_tv_fck@e00ti,gate-clock=dss_96m_fck@e00ti,gate-clockJdss2_alwon_fck@e00ti,gate-clock#dummy_ck fixed-clockJgpt1_gate_fck@c00ti,composite-gate-clock# Pgpt1_mux_fck@c40ti,composite-mux-clockE# @Qgpt1_fckti,composite-clockPQaes2_ick@a10ti,omap3-interface-clockO wkup_32k_fckfixed-factor-clockE|Rgpio1_dbck@c00ti,gate-clockR sha12_ick@a10ti,omap3-interface-clockO wdt2_fck@c00ti,wait-gate-clockR wdt2_ick@c10ti,omap3-interface-clockS wdt1_ick@c10ti,omap3-interface-clockS gpio1_ick@c10ti,omap3-interface-clockS omap_32ksync_ick@c10ti,omap3-interface-clockS gpt12_ick@c10ti,omap3-interface-clockS gpt1_ick@c10ti,omap3-interface-clockS per_96m_fckfixed-factor-clock.|per_48m_fckfixed-factor-clock5|Tuart3_fck@1000ti,wait-gate-clockT gpt2_gate_fck@1000ti,composite-gate-clock#Ugpt2_mux_fck@1040ti,composite-mux-clockE#@Vgpt2_fckti,composite-clockUVgpt3_gate_fck@1000ti,composite-gate-clock#Wgpt3_mux_fck@1040ti,composite-mux-clockE#@Xgpt3_fckti,composite-clockWXgpt4_gate_fck@1000ti,composite-gate-clock#Ygpt4_mux_fck@1040ti,composite-mux-clockE#@Zgpt4_fckti,composite-clockYZgpt5_gate_fck@1000ti,composite-gate-clock#[gpt5_mux_fck@1040ti,composite-mux-clockE#@\gpt5_fckti,composite-clock[\gpt6_gate_fck@1000ti,composite-gate-clock#]gpt6_mux_fck@1040ti,composite-mux-clockE#@^gpt6_fckti,composite-clock]^gpt7_gate_fck@1000ti,composite-gate-clock#_gpt7_mux_fck@1040ti,composite-mux-clockE#@`gpt7_fckti,composite-clock_`gpt8_gate_fck@1000ti,composite-gate-clock# agpt8_mux_fck@1040ti,composite-mux-clockE#@bgpt8_fckti,composite-clockabgpt9_gate_fck@1000ti,composite-gate-clock# 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gpt7_ick@1010ti,omap3-interface-clockfgpt6_ick@1010ti,omap3-interface-clockfgpt5_ick@1010ti,omap3-interface-clockfgpt4_ick@1010ti,omap3-interface-clockfgpt3_ick@1010ti,omap3-interface-clockfgpt2_ick@1010ti,omap3-interface-clockfmcbsp2_ick@1010ti,omap3-interface-clockfmcbsp3_ick@1010ti,omap3-interface-clockfmcbsp4_ick@1010ti,omap3-interface-clockfmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clock mcbsp4_gate_fck@1000ti,composite-gate-clock emu_src_mux_ck@1140 ti,mux-clock#ghi@jemu_src_ckti,clkdm-gate-clockjkpclk_fck@1140ti,divider-clockkZ@epclkx2_fck@1140ti,divider-clockkZ@eatclk_fck@1140ti,divider-clockkZ@etraceclk_src_fck@1140 ti,mux-clock#ghi@ltraceclk_fck@1140ti,divider-clockl Z@esecure_32k_fck fixed-clockJmgpt12_fckfixed-factor-clockm|wdt1_fckfixed-factor-clockm|security_l4_ick2fixed-factor-clockD|naes1_ick@a14ti,omap3-interface-clockn rng_ick@a14ti,omap3-interface-clockn sha11_ick@a14ti,omap3-interface-clockn des1_ick@a14ti,omap3-interface-clockn cam_mclk@f00ti,gate-clockocam_ick@f10!ti,omap3-no-wait-interface-clockDcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockC|ppka_ick@a14ti,omap3-interface-clockp icr_ick@a10ti,omap3-interface-clockO des2_ick@a10ti,omap3-interface-clockO mspro_ick@a10ti,omap3-interface-clockO mailboxes_ick@a10ti,omap3-interface-clockO ssi_l4_ickfixed-factor-clockD|wsr1_fck@c00ti,wait-gate-clock# sr2_fck@c00ti,wait-gate-clock# sr_l4_ickfixed-factor-clockD|dpll2_fck@40ti,divider-clock+Z@eqdpll2_ck@4ti,omap3-dpll-clock#q$@4rdpll2_m2_ck@44ti,divider-clockrZDesiva2_ck@0ti,wait-gate-clocksmodem_fck@a00ti,omap3-interface-clock# sad2d_ick@a10ti,omap3-interface-clockC mad2d_ick@a18ti,omap3-interface-clockC mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock$ tssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock$ @$ussi_ssr_fck_3430es2ti,composite-clocktuvssi_sst_fck_3430es2fixed-factor-clockv|hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockN ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockw usim_gate_fck@c00ti,composite-gate-clockJ  sys_d2_ckfixed-factor-clock#|yomap_96m_d2_fckfixed-factor-clockJ|zomap_96m_d4_fckfixed-factor-clockJ|{omap_96m_d8_fckfixed-factor-clockJ||omap_96m_d10_fckfixed-factor-clockJ| }dpll5_m2_d4_ckfixed-factor-clockx|~dpll5_m2_d8_ckfixed-factor-clockx|dpll5_m2_d16_ckfixed-factor-clockx|dpll5_m2_d20_ckfixed-factor-clockx|usim_mux_fck@c40ti,composite-mux-clock(#yz{|}~ @eusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockS  dpll5_ck@d04ti,omap3-dpll-clock##  $ L 4dpll5_m2_ck@d50ti,divider-clockZ Pexsgx_gate_fck@b00ti,composite-gate-clock+ core_d3_ckfixed-factor-clock+|core_d4_ckfixed-factor-clock+|core_d6_ckfixed-factor-clock+|omap_192m_alwon_fckfixed-factor-clock'|core_d2_ckfixed-factor-clock+|sgx_mux_fck@b40ti,composite-mux-clock / @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockC cpefuse_fck@a08ti,gate-clock# ts_fck@a08ti,gate-clockE usbtll_fck@a08ti,wait-gate-clockx usbtll_ick@a18ti,omap3-interface-clockO mmchs3_ick@a10ti,omap3-interface-clockO mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockDusbhost_120m_fck@1400ti,gate-clockxusbhost_48m_fck@1400ti,dss-gate-clock5usbhost_ick@1410ti,omap3-dss-interface-clockDuart4_fck@1000ti,wait-gate-clockTclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainkdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainrd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2  revsysc Rfckick+ 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'sw7ExWxixxxZZH<x,x=OZ+partition@0gxloaderpartition@80000gubootpartition@260000guboot environment&partition@2a0000glinux*@partition@6a0000grootfsjethernet@gpmcsmsc,lan9221smsc,lan9115mx7EWix(--,xKKO=     }default    ethernet@4,0smsc,lan9221smsc,lan9115}default   mx7EWix(--,xKKO=     usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs 3 > F }default O ^ fusb2-phy p2dss@48050000 ti,omap3-dssHokay dss_corefck+}defaultdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H  protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfcktv_dac_clk vportendpoint  #portendpoint  (ssi-controller@48058000 ti,omap3-ssissiokayHH sysgddGgdd_mpu+ v ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHH txrxCDssi-port@4805b000ti,omap3-ssi-portHH txrxEFserial@49042000ti,omap3-uartI P;QR@txrxuart4Jlregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0h base-addressint-address #  ` sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+ -B`isp@480bc000 ti,omap3-ispH H   ports+bandgap@48002524H%$ti,omap36xx-bandgap target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8 sysc  fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8 sysc  fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP  revsysc %  fckick+ Popp-tableoperating-points-v2-ti-cpuopp50-300000000  ssssss - >opp100-600000000 #F OOOOOO -opp130-800000000 / 777777 -opp1g-1000000000 ;  - Jopp_supplyti,omap-opp-supply Uthermal-zonescpu_thermal p  N  tripscpu_alert 8 passivecpu_crit _  criticalcooling-mapsmap0  memory@80000000~memoryleds gpio-leds}defaultledb gcm-t3x:green   heartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z p hsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z p"hsusb1_phyusb-nop-xceiv  !hsusb2_phyusb-nop-xceiv" !ads7846-regregulator-fixed ads7846-reg2Z2Zsvideo-connectorsvideo-connectorgtvportendpoint #soundti,omap-twl4030 cm-t35 $regulator-vddvarioregulator-fixed vddvario ' regulator-vdd33aregulator-fixedvdd33a ' wl12xx_vmmc2regulator-fixedvw1271}default%w@w@   N  ;wl12xx_vaux2regulator-fixedvwl1271_vaux2w@w@ N&encoder ti,tfp410 Y}default'ports+port@0endpoint (port@1endpoint )*dvi-connectordvi-connectorgdviportendpoint *)audio_ampregulator-fixed audio_amp}default+  ' compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpagesizebci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pullupsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplyvqmmc-supplynon-removablecap-power-off-cardref-clock-frequencystatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicegpioslinux,default-triggerstartup-delay-usreset-gpiosti,modelti,mcbspregulator-always-onenable-active-highvin-supplypowerdown-gpios