T8h( 05isee,omap3-igep0020ti,omap3630ti,omap36xxti,omap3 +!7IGEPv2 Rev. C (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/serial@4806a000`/ocp@68000000/serial@4806c000h/ocp@68000000/serial@49020000p/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8xcpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ 0Nkdefaultypinmux_gpmc_pins pinmux_uart1_pinsRLpinmux_uart3_pinsnppinmux_mcbsp2_pins  pinmux_mmc1_pins0pinmux_mmc2_pins0(*,.02pinmux_i2c1_pinspinmux_i2c3_pinspinmux_twl4030_pinsApinmux_tfp410_pinspinmux_dss_dpi_pinspinmux_uart2_pins DFHJpinmux_smsc9221_pins pinmux_lbee1usjyc_pins68:scm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock h mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock  mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ 0Npinmux_twl4030_vpins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H ` aes1@0 ti,omap3-aesP)  .txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P aes2@0 ti,omap3-aesP)AB.txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock8Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockHpS#sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockjudpll3_m2x2_ckfixed-factor-clock ju"dpll4_x2_ckfixed-factor-clock!jucorex2_fckfixed-factor-clock"ju$wkup_l4_ickfixed-factor-clock#juScorex2_d3_fckfixed-factor-clock$jucorex2_d5_fckfixed-factor-clock$juclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock8omap_32k_fck fixed-clock8Evirt_12m_ck fixed-clock8virt_13m_ck fixed-clock8]@virt_19200000_ck fixed-clock8$virt_26000000_ck fixed-clock8virt_38_4m_ck fixed-clock8Idpll4_ck@d00ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48ti,divider-clock!H? HS%dpll4_m2x2_mul_ckfixed-factor-clock%ju&dpll4_m2x2_ck@d00ti,hsdiv-gate-clock& 'omap_96m_alwon_fckfixed-factor-clock'ju.dpll3_ck@d00ti,omap3-dpll-core-clock## @ 0dpll3_m3_ck@1140ti,divider-clockH@S(dpll3_m3x2_mul_ckfixed-factor-clock(ju)dpll3_m3x2_ck@d00ti,hsdiv-gate-clock)  *emu_core_alwon_ckfixed-factor-clock*jugsys_altclk fixed-clock83mcbsp_clks fixed-clock8 dpll3_m2_ck@d40ti,divider-clockH @S core_ckfixed-factor-clock ju+dpll1_fck@940ti,divider-clock+H @S,dpll1_ck@904ti,omap3-dpll-clock#,  $ @ 4dpll1_x2_ckfixed-factor-clockju-dpll1_x2m2_ck@944ti,divider-clock-H DSAcm_96m_fckfixed-factor-clock.ju/omap_96m_fck@d40 ti,mux-clock/# @Jdpll4_m3_ck@e40ti,divider-clock!H @S0dpll4_m3x2_mul_ckfixed-factor-clock0ju1dpll4_m3x2_ck@d00ti,hsdiv-gate-clock1 2omap_54m_fck@d40 ti,mux-clock23 @=cm_96m_d2_fckfixed-factor-clock/ju4omap_48m_fck@d40 ti,mux-clock43 @5omap_12m_fckfixed-factor-clock5juLdpll4_m4_ck@e40ti,divider-clock!H@S6dpll4_m4x2_mul_ckti,fixed-factor-clock67dpll4_m4x2_ck@d00ti,gate-clock7 dpll4_m5_ck@f40ti,divider-clock!H?@S8dpll4_m5x2_mul_ckti,fixed-factor-clock89dpll4_m5x2_ck@d00ti,hsdiv-gate-clock9 odpll4_m6_ck@1140ti,divider-clock!H?@S:dpll4_m6x2_mul_ckfixed-factor-clock:ju;dpll4_m6x2_ck@d00ti,hsdiv-gate-clock; <emu_per_alwon_ckfixed-factor-clock<juhclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock+ p>clkout2_src_mux_ck@d70ti,composite-mux-clock+#/= p?clkout2_src_ckti,composite-clock>?@sys_clkout2@d70ti,divider-clock@H@ pmpu_ckfixed-factor-clockAjuBarm_fck@924ti,divider-clockB $Hemu_mpu_alwon_ckfixed-factor-clockBjuil3_ick@a40ti,divider-clock+H @SCl4_ick@a40ti,divider-clockCH @SDrm_ick@c40ti,divider-clockDH @Sgpt10_gate_fck@a00ti,composite-gate-clock#  Fgpt10_mux_fck@a40ti,composite-mux-clockE# @Ggpt10_fckti,composite-clockFGgpt11_gate_fck@a00ti,composite-gate-clock#  Hgpt11_mux_fck@a40ti,composite-mux-clockE# @Igpt11_fckti,composite-clockHIcore_96m_fckfixed-factor-clockJjummchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock    mcbsp1_gate_fck@a00ti,composite-gate-clock    core_48m_fckfixed-factor-clock5juKmcspi4_fck@a00ti,wait-gate-clockK mcspi3_fck@a00ti,wait-gate-clockK mcspi2_fck@a00ti,wait-gate-clockK mcspi1_fck@a00ti,wait-gate-clockK uart2_fck@a00ti,wait-gate-clockK uart1_fck@a00ti,wait-gate-clockK  core_12m_fckfixed-factor-clockLjuMhdq_fck@a00ti,wait-gate-clockM core_l3_ickfixed-factor-clockCjuNsdrc_ick@a10ti,wait-gate-clockN gpmc_fckfixed-factor-clockNjucore_l4_ickfixed-factor-clockDjuOmmchs2_ick@a10ti,omap3-interface-clockO mmchs1_ick@a10ti,omap3-interface-clockO hdq_ick@a10ti,omap3-interface-clockO mcspi4_ick@a10ti,omap3-interface-clockO mcspi3_ick@a10ti,omap3-interface-clockO mcspi2_ick@a10ti,omap3-interface-clockO mcspi1_ick@a10ti,omap3-interface-clockO i2c3_ick@a10ti,omap3-interface-clockO i2c2_ick@a10ti,omap3-interface-clockO i2c1_ick@a10ti,omap3-interface-clockO uart2_ick@a10ti,omap3-interface-clockO uart1_ick@a10ti,omap3-interface-clockO  gpt11_ick@a10ti,omap3-interface-clockO  gpt10_ick@a10ti,omap3-interface-clockO  mcbsp5_ick@a10ti,omap3-interface-clockO  mcbsp1_ick@a10ti,omap3-interface-clockO  omapctrl_ick@a10ti,omap3-interface-clockO dss_tv_fck@e00ti,gate-clock=dss_96m_fck@e00ti,gate-clockJdss2_alwon_fck@e00ti,gate-clock#dummy_ck fixed-clock8gpt1_gate_fck@c00ti,composite-gate-clock# Pgpt1_mux_fck@c40ti,composite-mux-clockE# @Qgpt1_fckti,composite-clockPQaes2_ick@a10ti,omap3-interface-clockO wkup_32k_fckfixed-factor-clockEjuRgpio1_dbck@c00ti,gate-clockR sha12_ick@a10ti,omap3-interface-clockO wdt2_fck@c00ti,wait-gate-clockR wdt2_ick@c10ti,omap3-interface-clockS wdt1_ick@c10ti,omap3-interface-clockS gpio1_ick@c10ti,omap3-interface-clockS omap_32ksync_ick@c10ti,omap3-interface-clockS gpt12_ick@c10ti,omap3-interface-clockS gpt1_ick@c10ti,omap3-interface-clockS per_96m_fckfixed-factor-clock.juper_48m_fckfixed-factor-clock5juTuart3_fck@1000ti,wait-gate-clockT gpt2_gate_fck@1000ti,composite-gate-clock#Ugpt2_mux_fck@1040ti,composite-mux-clockE#@Vgpt2_fckti,composite-clockUVgpt3_gate_fck@1000ti,composite-gate-clock#Wgpt3_mux_fck@1040ti,composite-mux-clockE#@Xgpt3_fckti,composite-clockWXgpt4_gate_fck@1000ti,composite-gate-clock#Ygpt4_mux_fck@1040ti,composite-mux-clockE#@Zgpt4_fckti,composite-clockYZgpt5_gate_fck@1000ti,composite-gate-clock#[gpt5_mux_fck@1040ti,composite-mux-clockE#@\gpt5_fckti,composite-clock[\gpt6_gate_fck@1000ti,composite-gate-clock#]gpt6_mux_fck@1040ti,composite-mux-clockE#@^gpt6_fckti,composite-clock]^gpt7_gate_fck@1000ti,composite-gate-clock#_gpt7_mux_fck@1040ti,composite-mux-clockE#@`gpt7_fckti,composite-clock_`gpt8_gate_fck@1000ti,composite-gate-clock# agpt8_mux_fck@1040ti,composite-mux-clockE#@bgpt8_fckti,composite-clockabgpt9_gate_fck@1000ti,composite-gate-clock# cgpt9_mux_fck@1040ti,composite-mux-clockE#@dgpt9_fckti,composite-clockcdper_32k_alwon_fckfixed-factor-clockEjuegpio6_dbck@1000ti,gate-clockegpio5_dbck@1000ti,gate-clockegpio4_dbck@1000ti,gate-clockegpio3_dbck@1000ti,gate-clockegpio2_dbck@1000ti,gate-clocke wdt3_fck@1000ti,wait-gate-clocke per_l4_ickfixed-factor-clockDjufgpio6_ick@1010ti,omap3-interface-clockfgpio5_ick@1010ti,omap3-interface-clockfgpio4_ick@1010ti,omap3-interface-clockfgpio3_ick@1010ti,omap3-interface-clockfgpio2_ick@1010ti,omap3-interface-clockf wdt3_ick@1010ti,omap3-interface-clockf uart3_ick@1010ti,omap3-interface-clockf uart4_ick@1010ti,omap3-interface-clockfgpt9_ick@1010ti,omap3-interface-clockf gpt8_ick@1010ti,omap3-interface-clockf gpt7_ick@1010ti,omap3-interface-clockfgpt6_ick@1010ti,omap3-interface-clockfgpt5_ick@1010ti,omap3-interface-clockfgpt4_ick@1010ti,omap3-interface-clockfgpt3_ick@1010ti,omap3-interface-clockfgpt2_ick@1010ti,omap3-interface-clockfmcbsp2_ick@1010ti,omap3-interface-clockfmcbsp3_ick@1010ti,omap3-interface-clockfmcbsp4_ick@1010ti,omap3-interface-clockfmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clock mcbsp4_gate_fck@1000ti,composite-gate-clock emu_src_mux_ck@1140 ti,mux-clock#ghi@jemu_src_ckti,clkdm-gate-clockjkpclk_fck@1140ti,divider-clockkH@Spclkx2_fck@1140ti,divider-clockkH@Satclk_fck@1140ti,divider-clockkH@Straceclk_src_fck@1140 ti,mux-clock#ghi@ltraceclk_fck@1140ti,divider-clockl H@Ssecure_32k_fck fixed-clock8mgpt12_fckfixed-factor-clockmjuwdt1_fckfixed-factor-clockmjusecurity_l4_ick2fixed-factor-clockDjunaes1_ick@a14ti,omap3-interface-clockn rng_ick@a14ti,omap3-interface-clockn sha11_ick@a14ti,omap3-interface-clockn des1_ick@a14ti,omap3-interface-clockn cam_mclk@f00ti,gate-clockocam_ick@f10!ti,omap3-no-wait-interface-clockDcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockCjuppka_ick@a14ti,omap3-interface-clockp icr_ick@a10ti,omap3-interface-clockO des2_ick@a10ti,omap3-interface-clockO mspro_ick@a10ti,omap3-interface-clockO mailboxes_ick@a10ti,omap3-interface-clockO ssi_l4_ickfixed-factor-clockDjuwsr1_fck@c00ti,wait-gate-clock# sr2_fck@c00ti,wait-gate-clock# sr_l4_ickfixed-factor-clockDjudpll2_fck@40ti,divider-clock+H@Sqdpll2_ck@4ti,omap3-dpll-clock#q$@4rdpll2_m2_ck@44ti,divider-clockrHDSsiva2_ck@0ti,wait-gate-clocksmodem_fck@a00ti,omap3-interface-clock# sad2d_ick@a10ti,omap3-interface-clockC mad2d_ick@a18ti,omap3-interface-clockC mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock$ tssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock$ @$ussi_ssr_fck_3430es2ti,composite-clocktuvssi_sst_fck_3430es2fixed-factor-clockvjuhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockN ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockw usim_gate_fck@c00ti,composite-gate-clockJ  sys_d2_ckfixed-factor-clock#juyomap_96m_d2_fckfixed-factor-clockJjuzomap_96m_d4_fckfixed-factor-clockJju{omap_96m_d8_fckfixed-factor-clockJju|omap_96m_d10_fckfixed-factor-clockJju }dpll5_m2_d4_ckfixed-factor-clockxju~dpll5_m2_d8_ckfixed-factor-clockxjudpll5_m2_d16_ckfixed-factor-clockxjudpll5_m2_d20_ckfixed-factor-clockxjuusim_mux_fck@c40ti,composite-mux-clock(#yz{|}~ @Susim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockS  dpll5_ck@d04ti,omap3-dpll-clock##  $ L 4dpll5_m2_ck@d50ti,divider-clockH PSxsgx_gate_fck@b00ti,composite-gate-clock+ core_d3_ckfixed-factor-clock+jucore_d4_ckfixed-factor-clock+jucore_d6_ckfixed-factor-clock+juomap_192m_alwon_fckfixed-factor-clock'jucore_d2_ckfixed-factor-clock+jusgx_mux_fck@b40ti,composite-mux-clock / @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockC cpefuse_fck@a08ti,gate-clock# ts_fck@a08ti,gate-clockE usbtll_fck@a08ti,wait-gate-clockx usbtll_ick@a18ti,omap3-interface-clockO mmchs3_ick@a10ti,omap3-interface-clockO mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockDusbhost_120m_fck@1400ti,gate-clockxusbhost_48m_fck@1400ti,dss-gate-clock5usbhost_ick@1410ti,omap3-dss-interface-clockDuart4_fck@1000ti,wait-gate-clockTclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainkdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainrd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscRfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Nick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma !, 9`gpio@48310000ti,omap3-gpioH1gpio1FXh gpio@49050000ti,omap3-gpioIgpio2Xh gpio@49052000ti,omap3-gpioI gpio3Xh gpio@49054000ti,omap3-gpioI@ gpio4Xh gpio@49056000ti,omap3-gpioI`!gpio5Xh "gpio@49058000ti,omap3-gpioI"gpio6Xh serial@4806a000ti,omap3-uartH tH)12.txrxuart18lkdefaultyserial@4806c000ti,omap3-uartHtI)34.txrxuart28lkdefaultyserial@49020000ti,omap3-uartItJ)56.txrxuart38lkdefaultyi2c@48070000 ti,omap3-i2cH8).txrx+i2c1kdefaulty8'@twl@48H  ti,twl4030 kdefaultyaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@ vdds_dsiregulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpioXh twl4030-usbti,twl4030-usb pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madc+i2c@48072000 ti,omap3-i2cH 9).txrx+i2c2i2c@48060000 ti,omap3-i2cH=).txrx+i2c3kdefaulty8 eeprom@50 ti,eepromPmailbox@48094000ti,omap3-mailboxmailboxH @=I[dsp m xspi@48098000ti,omap2-mcspiH A+mcspi1@)#$%&'()* .tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2 )+,-..tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 ).tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 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compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpioswp-gpiosmmc-pwrseqnon-removablestatus#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-deviceti,modelti,mcbspregulator-always-onlabeldefault-stategpiostartup-delay-usreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus