8((Phytec phyFLEX-i.MX6 Quad Carrier-Board2!phytec,imx6q-pbab01phytec,imx6q-pfla02fsl,imx6qchosen%,/soc/aips-bus@2100000/serial@21f0000memory8memoryaliases'D/soc/aips-bus@2100000/ethernet@2188000&N/soc/aips-bus@2000000/flexcan@2090000&S/soc/aips-bus@2000000/flexcan@2094000#X/soc/aips-bus@2000000/gpio@209c000#^/soc/aips-bus@2000000/gpio@20a0000#d/soc/aips-bus@2000000/gpio@20a4000#j/soc/aips-bus@2000000/gpio@20a8000#p/soc/aips-bus@2000000/gpio@20ac000#v/soc/aips-bus@2000000/gpio@20b0000#|/soc/aips-bus@2000000/gpio@20b4000"/soc/aips-bus@2100000/i2c@21a0000"/soc/aips-bus@2100000/i2c@21a4000"/soc/aips-bus@2100000/i2c@21a8000/soc/ipu@2400000$/soc/aips-bus@2100000/usdhc@2190000$/soc/aips-bus@2100000/usdhc@2194000$/soc/aips-bus@2100000/usdhc@2198000$/soc/aips-bus@2100000/usdhc@219c0006/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000%/soc/aips-bus@2100000/serial@21e8000%/soc/aips-bus@2100000/serial@21ec000%/soc/aips-bus@2100000/serial@21f0000%/soc/aips-bus@2100000/serial@21f40005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20080005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@200c0005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20100005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000%/soc/aips-bus@2000000/usbphy@20c9000%/soc/aips-bus@2000000/usbphy@20ca000/soc/ipu@28000005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2018000clocksckil!fsl,imx-ckilfixed-clock ckih1!fsl,imx-ckih1fixed-clock osc!fsl,imx-oscfixed-clock n6tempmon!fsl,imx6q-tempmon .19EVldb!fsl,imx6q-ldbfsl,imx53-ldb] adisabled@V!"'()*8hdi0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0t adisabledport@0tendpointxKport@1tendpointxOport@2tendpointxUport@3tendpointx Ylvds-channel@1t adisabledport@0tendpointx Lport@1tendpointx Pport@2tendpointx Vport@3tendpointx Zpmu!arm,cortex-a9-pmu .^soc !simple-busdma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbht 0.    gpmi0gpmi1gpmi2gpmi3Vjgpmi-nand@112000!fsl,imx6q-gpmi-nandt @ gpmi-nandbch .bch(V0hgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txaokaydefaulthdmi@120000t .s]V{| hiahbisfraokay!fsl,imx6q-hdmiport@0tendpointxIport@1tendpointxMport@2tendpointxSport@3tendpointxWgpu@130000 !vivante,gct@ . VzJhbuscoreshadergpu@134000 !vivante,gct@@ . Vy hbuscoretimer@a00600!arm,cortex-a9-twd-timert  . Vinterrupt-controller@a01000!arm,cortex-a9-gic!tl2-cache@a02000!arm,pl310-cachet  .\6D P `q[pcie@1ffc000!fsl,imx6q-pciesnps,dw-pciet@ dbiconfig8pci0 .xmsi{zyxVhpciepcie_buspcie_phyaokaydefault aips-bus@2000000!fsl,aips-bussimple-bustspba-bus@2000000!fsl,spba-bussimple-bustspdif@2004000!fsl,imx35-spdift@@ .4 rxtxPVkv>:hcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba adisabledecspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspit@ .Vpphipgper rxtx adisabledecspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspit@ . Vqqhipgper rxtx adisabledecspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspit@ .!Vrrhipgper rxtxaokaydefault flash@0!m25p80jedec,spi-nor1-tecspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspit@@ ."Vsshipgper   rxtx adisabledserial@2020000!fsl,imx6q-uartfsl,imx21-uartt@ .Vhipgper rxtx adisabledesai@2024000!fsl,imx35-esait@@ .3(Vvhcorememextalfsysspba rxtx adisabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssit@ ..V hipgbaud %&rxtx adisabledssi@202c000!fsl,imx6q-ssifsl,imx51-ssit@ ./V hipgbaud )*rxtxaokaygssi@2030000!fsl,imx6q-ssifsl,imx51-ssit@ .0V hipgbaud -.rxtx adisabledasrc@2034000!fsl,imx53-asrct@@ .2Vkhmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxcaokayspba@203c000t@ecspi@2018000 !fsl,imx6q-ecspifsl,imx51-ecspit@ .#Vtthipgper   rxtx adisabledvpu@2040000!fsl,imx6q-vpucnm,coda960t.  bitjpegVhperahb$aipstz@207c000t@pwm@2080000)!fsl,imx6q-pwmfsl,imx27-pwmt@ .SV>hipgper adisabledpwm@2084000)!fsl,imx6q-pwmfsl,imx27-pwmt@@ .TV>hipgper adisabledpwm@2088000)!fsl,imx6q-pwmfsl,imx27-pwmt@ .UV>hipgper adisabledpwm@208c000)!fsl,imx6q-pwmfsl,imx27-pwmt@ .VV>hipgper adisabledflexcan@2090000!fsl,imx6q-flexcant @ .nVlmhipgperaokaydefaultflexcan@2094000!fsl,imx6q-flexcant @@ .oVnohipgper adisabledgpt@2098000!fsl,imx6q-gptfsl,imx31-gptt @ .7Vwxhipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpiot @.BC4D!P   t 3gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpiot @.DE4D!@P7#,7gpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpiot @@.FG4D!0PE$-0gpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpiot @.HI4D!0P~ Wgpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpiot @.JK4D!PPU"5g gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpiot @.LM4D!pP6 Vgpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpiot @@.NO4D!0P   kpp@20b8000!fsl,imx6q-kppfsl,imx21-kppt @ .RV> adisabledwdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdtt @ .PVwdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdtt @ .QV adisabledccm@20c4000!fsl,imx6q-ccmt @@.WXanatop@20c8000#!fsl,imx6q-anatopsysconsimple-bust $.16regulator-1p1!fsl,anatop-regulator\vdd1p1kB@O 5$regulator-3p0!fsl,anatop-regulator\vdd3p0k*0 ( 3@$regulator-2p5!fsl,anatop-regulator\vdd2p5k"U)00 +x$regulator-vddcore!fsl,anatop-regulator\vddarmk  @6pNe  |\regulator-vddpu!fsl,anatop-regulator\vddpuk  @ 6pNe  |!regulator-vddsoc!fsl,anatop-regulator\vddsock  @6pNe  |]usbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyt  .,V(usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyt  .-V,snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdt @ snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp 4.snvs-poweroff!syscon-poweroff 8`` adisabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000t @ .8epit@20d4000t @@ .9src@20d8000!fsl,imx6q-srcfsl,imx51-srct @.[`gpc@20dc000!fsl,imx6q-gpct @!.YZV>hipgpgcpower-domain@0tpower-domain@1t!0VzJyiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfdt8mux-controller !mmio-mux8 (( "ipu1_csi0_mux !video-mux "port@0tendpointx#=port@1tendpointport@2tendpointx$Gipu2_csi1_mux !video-mux "port@0tendpointx%@port@1tendpointport@2tendpointx&Riomuxc@20e0000!fsl,imx6q-iomuxct@default'imx6q-phytec-pfla02hoggrpx| 'ecspi3grpHxtpenetgrp@Xl0\p0`t0dx0h|0t0D0pH0xL0|P0T0lX0/flexcan1grp0 gpminandgrp i2c1grp0@@6i2c2grp0@@8i2c3grp0@@;pciegrp`tuart3grp` 0 ,Euart4grp0 8Fusbh1grp .usbotggrpH$ pY D+usdhc2grpX@pYT<YThpYL`pYPdpY\DpY2usdhc3grppYYpYpYpYpY4usdhc3cdwp05audmuxgrp`000<dcic@20e4000t@@ .|dcic@20e8000t@ .}sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdmat@ .V>hipgahb imx/sdma/sdma-imx6q.binaips-bus@2100000!fsl,aips-bussimple-bustcaam@2100000 !fsl,sec-v4.0t  Vhmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ringt .ijr1@2000!fsl,sec-v4.0-job-ringt  .jaipstz@217c000t@usb@2184000!fsl,imx6q-usbfsl,imx27-usbt@ .+V9(D)Pauaokay*default+usb@2184200!fsl,imx6q-usbfsl,imx27-usbtB .(V9,D)hostPauaokay-default.usb@2184400!fsl,imx6q-usbfsl,imx27-usbtD .)VD)hostPau adisabledusb@2184600!fsl,imx6q-usbfsl,imx27-usbtF .*VD)hostPau adisabledusbmisc@2184800!fsl,imx6q-usbmisctHV)ethernet@2188000!fsl,imx6q-fect@ int0pps.vwVuu hipgahbptpaokaydefault/rgmii  01mlb@218c000t@$.5u~usdhc@2190000!fsl,imx6q-usdhct@ .V hipgahbper adisabledusdhc@2194000!fsl,imx6q-usdhct@@ .V hipgahbperaokaydefault2 3  3usdhc@2198000!fsl,imx6q-usdhct@ .V hipgahbperaokaydefault45 3  3usdhc@219c000!fsl,imx6q-usdhct@ .V hipgahbper adisabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2ct@ .$V}aokaydefault6eeprom@50 !atmel,24c32tPpmic@58 !dlg,da9063tX7. regulatorsbcore1k #bcore2k #bprok``bperik2Z2Zbmemk2Z2ZbiokOOldo4k&%&%1ldo5k--ldo6k2Z2Zldo9k2Z2Zldo10k2Z2Zldo11k--i2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2ct@@ .%V~aokaydefault8 tlv320@18!ti,tlv320aic3007t"9.9;9H:hstmpe@41 !st,stmpe811tArtc@51 !nxp,rtc8564tQadc@64!maxim,max1037tdi2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2ct@ .&Vaokaydefault; romcp@21ac000t@mmdc@21b0000!fsl,imx6q-mmdct@mmdc@21b4000t@@weim@21b8000!fsl,imx6q-weimt@ .VT adisabledocotp@21bc000!fsl,imx6q-ocotpsyscont@Vtzasc@21d0000t@ .ltzasc@21d4000t@@ .maudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxt@aokaydefault<ssi2dtpins5dt mipi@21dc000!fsl,imx6-mipi-csi2t@.deVa hdphyrefpix adisabledport@1tendpointx=#port@2tendpointx>Hport@3tendpointx?Qport@4tendpointx@%mipi@21e0000t@ adisabledportsport@0tendpointxAJport@1tendpointxBNport@2tendpointxCTport@3tendpointxDXvdoa@21e4000!fsl,imx6q-vdoat@@ .Vserial@21e8000!fsl,imx6q-uartfsl,imx21-uartt@ .Vhipgper rxtx adisabledserial@21ec000!fsl,imx6q-uartfsl,imx21-uartt@ .Vhipgper rxtxaokaydefaultEserial@21f0000!fsl,imx6q-uartfsl,imx21-uartt@ .Vhipgper  rxtxaokaydefaultFserial@21f4000!fsl,imx6q-uartfsl,imx21-uartt@@ .Vhipgper !"rxtx adisabledipu@2400000!fsl,imx6q-iput@@.V hbusdi0di1port@0t^endpointxG$port@1t_endpointxH>port@2tbendpoint@0tendpoint@1txIendpoint@2txJAendpoint@3txKendpoint@4txL port@3tcendpoint@0tendpoint@1txMendpoint@2txNBendpoint@3txOendpoint@4txP sram@900000 !mmio-sramtVsata@2200000!fsl,imx6q-ahcit @ .'Vihsatasata_refahbaokaygpu@2204000 !vivante,gct @@ . Vy hbuscoreipu@2800000!fsl,imx6q-iput@.V hbusdi0di1port@0t`endpointxQ?port@1taendpointxR&port@2tdendpoint@0tendpoint@1txSendpoint@2txTCendpoint@3txUendpoint@4txV port@3teendpoint@1txWendpoint@2txXDendpoint@3txY endpoint@4txZ cpuscpu@0!arm,cortex-a98cput[(Otx2   (Otx2   l(Vh)harmpll2_pfd2_396msteppll1_swpll1_sys\!]cpu@1!arm,cortex-a98cput[(Otx2   (Otx2   l(Vh)harmpll2_pfd2_396msteppll1_swpll1_sys\!]cpu@2!arm,cortex-a98cput[(Otx2   (Otx2   l(Vh)harmpll2_pfd2_396msteppll1_swpll1_sys\!]cpu@3!arm,cortex-a98cput[(Otx2   (Otx2   l(Vh)harmpll2_pfd2_396msteppll1_swpll1_sys\!]capture-subsystem!fsl,imx-capture-subsystem^_`adisplay-subsystem!fsl,imx-display-subsystembcdememory@10000000tregulators !simple-busregulator@0!regulator-fixedt \usb_otg_vbuskLK@LK@ *regulator@1!regulator-fixedt \usb_h1_vbuskLK@LK@ 3-regulator@2!regulator-fixedt\i2s-audio-1v8kw@w@:regulator@3!regulator-fixedt\i2s-audio-3v3k2Z2Z9leds !gpio-ledsgreenphyflex:green 3red phyflex:red 7oscillator !fixed-clock $ tlv320-mclkisound!simple-audio-card.OnboardTLV320AIC3007Ei2s^ffXMicrophoneMic JackLineLine InLineLine OutSpeakerSpeakerHeadphoneHeadphone JackLine OutLLOUTLine OutRLOUTSpeakerSPOPSpeakerSPOMHeadphone JackHPLOUTHeadphone JackHPROUTMIC3LMic JackMIC3RMic JackMic JackMic BiasLINE1LLine InLINE1RLine Insimple-audio-card,cpugsimple-audio-card,codechVif #address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1ipu1spi4#clock-cellsclock-frequencyinterrupt-parentinterruptsfsl,tempmonfsl,tempmon-dataclocksgprstatusclock-namesregremote-endpointphandlerangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespinctrl-namespinctrl-0nand-on-flash-bbtpower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridebus-rangenum-lanesinterrupt-map-maskinterrupt-mapreset-gpiocs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthvin-supplyregulator-enable-ramp-delayfsl,anatopregmapvalue#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsphy-modephy-reset-durationphy-reset-gpiosphy-supplybus-widthcd-gpioswp-gpiosai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyfsl,weim-cs-gprfsl,audmux-portfsl,port-confignext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latency#cooling-cellsarm-supplypu-supplysoc-supplyportsenable-active-highlabelclock-output-namessimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-dai