V8P(PSamsung Galaxy S5!samsung,klteqcom,msm8974,chosen=serial0:115200n8aliasesI/soc/serial@f991d000memoryQmemory]reserved-memoryampss@8000000]hmba@d100000] hreserved@d200000] hadsp@dc00000] hovenus@f500000]PPhsmem@fa00000] hotz@fc00000]hrfsa@fd60000]hrmtfs@fd80000]hcpus w cpu@0 !qcom,kraitqcom,kpss-acc-v2Qcpu]o1cpu@1 !qcom,kraitqcom,kpss-acc-v2Qcpu]o3cpu@2 !qcom,kraitqcom,kpss-acc-v2Qcpu] o5cpu@3 !qcom,kraitqcom,kpss-acc-v2Qcpu]  o7l2-cache!cache oidle-statesspc#!qcom,idle-state-spcarm,idle-stateothermal-zonescpu-thermal0% tripstrip05$AXpassivetrip15A Xcriticalcpu-thermal1% tripstrip05$AXpassivetrip15A Xcriticalcpu-thermal2% tripstrip05$AXpassivetrip15A Xcriticalcpu-thermal3% tripstrip05$AXpassivetrip15A Xcriticalcpu-pmu!qcom,krait-pmu wclocksxo_board !fixed-clockLY$osleep_clk !fixed-clockLYtimer!arm,armv7-timer0wY$adsp-pil!qcom,msm8974-adsp-pil@i#}wdogfatalreadyhandoverstop-ackxostopsmem !qcom,smemsmp2p-adsp !qcom,smp2p, w   master-kernel*master-kernel:oslave-kernel *slave-kernelQfosmp2p-modem !qcom,smp2p, w  master-kernel*master-kernel:slave-kernel *slave-kernelQfsmp2p-wcnss !qcom,smp2p, w  master-kernel*master-kernel:slave-kernel *slave-kernelQfsmsm !qcom,smsm w    apps@0]:modem@1] wQfadsp@2] wQfwcnss@7] wQffirmwarescm !qcom,scmcorebusifacesoca !simple-businterrupt-controller@f9000000!qcom,msm-qgic2Qf] osyscon@f9011000!syscon]oqfprom@fc4bc000 !qcom,qfprom]Kcalib@d0]obackup@440]@othermal-sensor@fc4a8000!qcom,msm8974-tsens]J calibcalib_backupo timer@f9020000a!arm,armv7-timer-mem]Y$frame@f9021000w] frame@f9023000 w ]0 disabledframe@f9024000 w ]@ disabledframe@f9025000 w ]P disabledframe@f9026000 w ]` disabledframe@f9027000 w ]p disabledframe@f9028000 w] disabledpower-controller@f9089000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2]opower-controller@f9099000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2] opower-controller@f90a9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2] o power-controller@f90b9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2] o power-controller@f9012000 !qcom,saw2] o clock-controller@f9088000!qcom,kpss-acc-v2]oclock-controller@f9098000!qcom,kpss-acc-v2] oclock-controller@f90a8000!qcom,kpss-acc-v2] oclock-controller@f90b8000!qcom,kpss-acc-v2] o restart@fc4ab000 !qcom,pshold]Jclock-controller@fc400000!qcom,gcc-msm8974proL]@@osyscon@fd4a0000!syscon]Jsyscon@fd484000!syscon]H@ oclock-controller@fd8c0000!qcom,mmcc-msm8974L]`tcsr-mutex!qcom,tcsr-mutex  omemory@fc428000!qcom,rpm-msg-ram]B@oserial@f991d000%!qcom,msm-uartdm-v1.4qcom,msm-uartdm] wkeW coreiface disabledserial@f991e000%!qcom,msm-uartdm-v1.4qcom,msm-uartdm] wlgW coreifaceoksdhci@f9824900!qcom,sdhci-msm-v4]I@hc_memcore_memw{}hc_irqpwr_irq$10coreifacexocalsleep disabledsdhci@f9864900!qcom,sdhci-msm-v4]I@hc_memcore_memw}hc_irqpwr_irqcoreifacexo disabledsdhci@f98a4900!qcom,sdhci-msm-v4]I@hc_memcore_memw}}hc_irqpwr_irqcoreifacexo disabledusb@f9a55000 !qcom,ci-hdrc]PR w  ifacecore) 9xhN Ucoreaulpijotgrusb-phy disabledoulpiphy@a(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phy  refsleepN Uphypor disabledphy@b(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phy  refsleepN Uphypor disabledrng@f9bff000 !qcom,prng]corepinctrl@fd510000!qcom,msm8974-pinctrl]Q@Qf wi2c@f9924000 disabled!qcom,i2c-qup-v2.1.1]@ w`[W coreifacei2c@f9964000 disabled!qcom,i2c-qup-v2.1.1]@ wfuq coreifacei2c@f9967000 disabled!qcom,i2c-qup-v2.1.1]p wi{q coreifacetxrxspmi@fc4cf000!qcom,spmi-pmic-arbcoreintrcnfg]LLL }periph_irq wQfpm8841@4!qcom,pm8841qcom,spmi-pmic]mpps@a000!qcom,pm8841-mppqcom,spmi-mpp]@wtemp-alarm@2400!qcom,spmi-temp-alarm]$w$pm8841@5!qcom,pm8841qcom,spmi-pmic]pm8941@0!qcom,pm8941qcom,spmi-pmic]rtc@6000!qcom,pm8941-rtc]`a rtcalarmwapwrkey@800!qcom,pm8941-pwrkey]w= misc@900!qcom,pm8941-misc] w }usb_idcharger@1000!qcom,pm8941-charger]wO}chg-donechg-fastchg-trklbat-temp-okbat-presentchg-goneusb-validdc-validotg-vbusgpios@c000 !qcom,pm8941-gpioqcom,spmi-gpio]@wo9boost-bypassgpio21normalo:mpps@a000!qcom,pm8941-mppqcom,spmi-mpp]wtemp-alarm@2400!qcom,spmi-temp-alarm]$w$thermalvadc@3100!qcom,spmi-vadc]1w1+obat_temp]0die_temp]ref_625mv] ref_1250v] ref_gnd]ref_vdd]vbat_sns]iadc@3600 !qcom,pm8941-iadcqcom,spmi-iadc]6w6='coincell@2800!qcom,pm8941-coincell]( disabledpm8941@1!qcom,pm8941qcom,spmi-pmic]wled@d800!qcom,pm8941-wled] _backlight disabledregulators!qcom,pm8941-regulators w}ocp-5vs1ocp-5vs2es4tLK@LK@o5vs1   <odma-controller@f9944000!qcom,bam-v1.4.0]@ wqbam_clkSoetr@fc322000 !arm,coresight-tmcarm,primecell]2   apb_pclkatclkportendpoint^i!o#tpiu@fc318000!!arm,coresight-tpiuarm,primecell]1  apb_pclkatclkportendpoint^i"o$replicator@fc31c000/!arm,coresight-dynamic-replicatorarm,primecell]1  apb_pclkatclkportsport@0]endpointi#o!port@1]endpointi$o"port@2]endpoint^i%o&etf@fc307000 !arm,coresight-tmcarm,primecell]0p  apb_pclkatclkportsport@0]endpointi&o%port@1]endpoint^i'o)funnel@fc31b000#!arm,coresight-funnelarm,primecell]1  apb_pclkatclkportsport@1]endpoint^i(o+port@8]endpointi)o'funnel@fc31a000#!arm,coresight-funnelarm,primecell]1  apb_pclkatclkportsport@5]endpoint^i*o0port@8]endpointi+o(funnel@fc345000#!arm,coresight-funnelarm,primecell]4P  apb_pclkatclkportsport@0]endpoint^i,o2port@1]endpoint^i-o4port@2]endpoint^i.o6port@3]endpoint^i/o8port@8]endpointi0o*etm@fc33c000"!arm,coresight-etm4xarm,primecell]3  apb_pclkatclky1portendpointi2o,etm@fc33d000"!arm,coresight-etm4xarm,primecell]3  apb_pclkatclky3portendpointi4o-etm@fc33e000"!arm,coresight-etm4xarm,primecell]3  apb_pclkatclky5portendpointi6o.etm@fc33f000"!arm,coresight-etm4xarm,primecell]3  apb_pclkatclky7portendpointi8o/smd !qcom,smdadsp w }modem w  }rpm w }rpm_requests!qcom,rpm-msm8974 rpm_requestsclock-controller!qcom,rpmcc-msm8974qcom,rpmccLo pm8841-regulators!qcom,rpm-pm8841-regulatorss1s2os3s4s5s6s7s8pm8941-regulators!qcom,rpm-pm8941-regulatorss1s2s3l1l2l3l4l5l6l7l8l9l10l11l12l13l14l15l16l17l18l19l20l21l22l23l24lvs1lvs2lvs3vreg-boost!regulator-fixed vreg-boostt00 9default:vreg-vph-pwr!regulator-fixedvph-pwrt66 #address-cells#size-cellsmodelcompatibleinterrupt-parentstdout-pathserial0device_typeregrangesno-mapphandleinterruptsenable-methodnext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#clock-cellsclock-frequencyinterrupts-extendedinterrupt-namescx-supplyclocksclock-namesmemory-regionqcom,smem-statesqcom,smem-state-namesqcom,rpm-msg-ramhwlocksqcom,smemqcom,ipcqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsqcom,ipc-1qcom,ipc-2qcom,ipc-3nvmem-cellsnvmem-cell-names#thermal-sensor-cellsframe-numberstatusregulator#reset-cells#power-domain-cellssyscon#hwlock-cellsreg-namesassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modeahb-burst-configphy-names#phy-cellsgpio-controller#gpio-cellsdmasdma-namesqcom,eeqcom,channeldebouncebias-pull-upusb-otg-in-supplypinsfunctionio-channelsio-channel-names#io-channel-cellsqcom,external-resistor-micro-ohmslabelvin_5vs-supplyregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-pull-downregulator-over-current-protectionqcom,ocp-max-retriesqcom,ocp-retry-delayqcom,vs-soft-start-strengthregulator-initial-mode#dma-cellsslave-moderemote-endpointcpuqcom,smd-edgeqcom,smd-channelsregulator-nameregulator-always-onregulator-boot-ongpioenable-active-highpinctrl-namespinctrl-0