P8L(L,Miniand Hackberry&2miniand,hackberryallwinner,sun4i-a10aliases=/soc/ethernet@1c0b000G/soc/serial@1c28000chosenOVserial0:115200n8framebuffer-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_be0-lcd0-hdmi0u8<> |disabledframebuffer-fe0-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_fe0-de_be0-lcd0-hdmiPu8<>@ |disabledframebuffer-fe0-lcd002allwinner,simple-framebuffersimple-framebufferbde_fe0-de_be0-lcd0@u8>@ |disabledframebuffer-fe0-lcd0-tve002allwinner,simple-framebuffersimple-framebufferbde_fe0-de_be0-lcd0-tve0Pu68>@ |disabledcpuscpu@0cpu2arm,cortex-a8u a\ p / thermal-zonescpu-thermalcooling-mapsmap0 tripscpu-alert0 Ppassivecpu-crit criticalclocksOclk-24M( 2fixed-clock5n6Eosc24Mclk-32k( 2fixed-clock5Eosc32kdisplay-engine#2allwinner,sun4i-a10-display-engineX |disabledsoc 2simple-busOsystem-control@1c00000#2allwinner,sun4i-a10-system-control0Osram@0 2mmio-sram Osram-section@80002allwinner,sun4i-a10-sram-a3-a4@|okay sram@10000 2mmio-sram Osram-section@02allwinner,sun4i-a10-sram-d |disableddma-controller@1c020002allwinner,sun4i-a10-dma lu wnand@1c030002allwinner,sun4i-a10-nand0l%u'`ahbmod rxtx |disabledspi@1c050002allwinner,sun4i-a10-spiPl u,pahbmodrxtx |disabledspi@1c060002allwinner,sun4i-a10-spi`l u-qahbmod rxtxdefault  |disabledethernet@1c0b0002allwinner,sun4i-a10-emacl7u* default |okay mdio@1c0b0802allwinner,sun4i-a10-mdio|okayethernet-phy@0 lcd-controller@1c0c0002allwinner,sun4i-a10-tconl, lcdu8ahbtcon-ch0tcon-ch1Etcon0-pixel-clock portsport@0endpoint@0/endpoint@1+port@1endpoint@1lcd-controller@1c0d0002allwinner,sun4i-a10-tconl- lcdu9ahbtcon-ch0tcon-ch1Etcon1-pixel-clock portsport@0endpoint@00endpoint@1,port@1endpoint@1mmc@1c0f0002allwinner,sun4i-a10-mmcu"bahbmmcl default|okay #mmc@1c100002allwinner,sun4i-a10-mmcu#eahbmmcl! |disabledmmc@1c110002allwinner,sun4i-a10-mmcu$hahbmmcl" |disabledmmc@1c120002allwinner,sun4i-a10-mmc u%kahbmmcl# |disabledusb@1c130002allwinner,sun4i-a10-musb0ul&,mc<AusbK |disabledphy@1c13400R2allwinner,sun4i-a10-usb-phy4H]phy_ctrlpmu1pmu2u}usb_phy!usb0_resetusb1_resetusb2_reset|okaygxusb@1c14000&2allwinner,sun4i-a10-ehcigeneric-ehci@l'u<Ausb|okayusb@1c14400&2allwinner,sun4i-a10-ohcigeneric-ohciDl@u{<Ausb|okaycrypto-engine@1c150002allwinner,sun4i-a10-cryptoPlVuoahbmodhdmi@1c160002allwinner,sun4i-a10-hdmi`l: u< ahbmodpll-0pll-1$ddc-txddc-rxaudio-tx |disabledportsport@0endpoint@0endpoint@1port@1spi@1c170002allwinner,sun4i-a10-spipl u.rahbmodrxtx |disabledsata@1c180002allwinner,sun4i-a10-ahcil8u1z |disabledusb@1c1c000&2allwinner,sun4i-a10-ehcigeneric-ehcil(u<Ausb|okayusb@1c1c400&2allwinner,sun4i-a10-ohcigeneric-ohcilAu|<Ausb|okayspi@1c1f0002allwinner,sun4i-a10-spil2u/ahbmodrxtx |disabledclock@1c200002allwinner,sun4i-a10-ccuu hosclosc(interrupt-controller@1c204002allwinner,sun4i-a10-icpinctrl@1c208002allwinner,sun4i-a10-pinctrlluJapbhosclosccan0-ph-pins PH20PH21canemac0-pinsKPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16emac i2c0-pinsPB0PB1i2c0"i2c1-pins PB18PB19i2c1#i2c2-pins PB20PB21i2c2$ir0-rx-pinPB4ir0 ir0-tx-pinPB3ir0ir1-rx-pinPB23ir1ir1-tx-pinPB22ir1mmc0-pinsPF0PF1PF2PF3PF4PF5mmc0ps2-ch0-pins PI20PI21ps2ps2-ch1-ph-pins PH12PH13ps2pwm0-pinPB2pwmpwm1-pinPI3pwmspdif-tx-pinPB13spdifspi0-pi-pinsPI11PI12PI13spi0spi0-cs0-pi-pinPI10spi0spi1-pinsPI17PI18PI19spi1 spi1-cs0-pinPI16spi1 spi2-pb-pinsPB15PB16PB17spi2spi2-pc-pinsPC20PC21PC22spi2spi2-cs0-pb-pinPB14spi2spi2-cs0-pc-pinPC19spi2uart0-pb-pins PB22PB23uart0!uart0-pf-pinsPF2PF4uart0uart1-pins PA10PA11uart1timer@1c20c002allwinner,sun4i-a10-timer luwatchdog@1c20c902allwinner,sun4i-a10-wdt rtc@1c20d002allwinner,sun4i-a10-rtc lpwm@1c20e002allwinner,sun4i-a10-pwm u |disabledspdif@1c21000 2allwinner,sun4i-a10-spdifl uFx apbspdifrxtx |disabledir@1c218002allwinner,sun4i-a10-iruKtapbirl@|okaydefault ir@1c21c002allwinner,sun4i-a10-iruLuapbirl@ |disabledi2s@1c22400 2allwinner,sun4i-a10-i2s$luGvapbmodrxtx |disabledlradc@1c228002allwinner,sun4i-a10-lradc-keys(l |disabledcodec@1c22c00 2allwinner,sun4i-a10-codec,@luE apbcodecrxtx |disabledeeprom@1c238002allwinner,sun4i-a10-sid8rtp@1c250002allwinner,sun4i-a10-tsPlserial@1c280002snps,dw-apb-uart€l4>uX|okaydefault!serial@1c284002snps,dw-apb-uart„l4>uY |disabledserial@1c288002snps,dw-apb-uartˆl4>uZ |disabledserial@1c28c002snps,dw-apb-uartŒl4>u[ |disabledserial@1c290002snps,dw-apb-uartl4>u\ |disabledserial@1c294002snps,dw-apb-uart”l4>u] |disabledserial@1c298002snps,dw-apb-uart˜l4>u^ |disabledserial@1c29c002snps,dw-apb-uartœl4>u_ |disabledps2@1c2a0002allwinner,sun4i-a10-ps2 l>uU |disabledps2@1c2a4002allwinner,sun4i-a10-ps2¤l?uV |disabledi2c@1c2ac002allwinner,sun4i-a10-i2c¬luOdefault" |disabledi2c@1c2b0002allwinner,sun4i-a10-i2c°luPdefault# |disabledi2c@1c2b4002allwinner,sun4i-a10-i2c´l uQdefault$ |disabledcan@1c2bc002allwinner,sun4i-a10-can¼luS |disabledgpu@1c40000&2allwinner,sun4i-a10-maliarm,mali-400lEFGHI,gpgpmmupp0ppmmu0pmuuD buscoreK[`display-frontend@1e00000%2allwinner,sun4i-a10-display-frontendl/u@ ahbmodramportsport@1endpoint@0%-endpoint@1&)display-frontend@1e20000%2allwinner,sun4i-a10-display-frontendl0uA ahbmodramportsport@1endpoint@0'.endpoint@1(*display-backend@1e40000$2allwinner,sun4i-a10-display-backendl0u? ahbmodramportsport@0endpoint@0)&endpoint@1*(port@1endpoint@0+endpoint@1,display-backend@1e60000$2allwinner,sun4i-a10-display-backendl/u> ahbmodramportsport@0endpoint@0-%endpoint@1.'port@1endpoint@0/endpoint@10ahci-5v2regulator-fixedpahci-5vLK@LK@ |disabledusb0-vbus2regulator-fixed pusb0-vbusLK@LK@  |disabledusb1-vbus2regulator-fixed pusb1-vbusLK@LK@|okayusb2-vbus2regulator-fixed pusb2-vbusLK@LK@ |okayvcc3v02regulator-fixedpvcc3v0--vcc3v32regulator-fixedpvcc3v32Z2Zvcc5v02regulator-fixedpvcc5v0LK@LK@emac-3v32regulator-fixed pemac-3v32Z2ZN  #address-cells#size-cellsinterrupt-parentmodelcompatibleethernet0serial0rangesstdout-pathallwinner,pipelineclocksstatusdevice_typeregclock-latencyoperating-points#cooling-cellsphandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-frequencyclock-output-namesallwinner,pipelinesinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0allwinner,sramphyphy-supplyresetsreset-namesremote-endpointallwinner,tcon-channelvmmc-supplybus-widthcd-gpiosinterrupt-namesphysphy-namesextcon#phy-cellsreg-namesusb1_vbus-supplyusb2_vbus-supply#reset-cellsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-up#pwm-cells#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthassigned-clocksassigned-clock-ratesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiostartup-delay-us