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#address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1ipu1spi4mdio-gpio0rtc0#clock-cellsclock-frequencyinterrupt-parentinterruptsfsl,tempmonfsl,tempmon-dataclocksgprstatusclock-namesregremote-endpointphandlerangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespower-domainsassigned-clocksassigned-clock-parents#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridebus-rangenum-lanesinterrupt-map-maskinterrupt-mappinctrl-namespinctrl-0reset-gpiocs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthvin-supplyregulator-enable-ramp-delayfsl,anatopregmapvalue#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsphy-modephy-handlephy-reset-gpiosphy-reset-durationphy-supplydsa,membereeprom-lengthlabelethernetspeedfull-duplexbus-widthcd-gpioswp-gpiosvmmc-supplyvqmmc-supplyno-1-8-vno-sdionon-removableno-sdHPVDD-supplySPRVDD-supplySPLVDD-supplyAVDD-supplyIOVDD-supplyDVDD-supplygpio-resetpower-gpioVdd-supplyshutdown-gpiosregulator-boot-onregulator-ramp-delayassigned-clock-ratesvdd-supplyvio-supplysyna,nosleep-modetouchscreen-inverted-xtouchscreen-swapped-x-ysyna,sensor-typewakeup-gpiosfsl,weim-cs-gprfsl,audmux-portfsl,port-configuart-has-rtsctslinux,rs485-enabled-at-boot-timecurrent-speedzii,eeprom-namefsl,iramfsl,presfsl,prgtarget-supplynext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latency#cooling-cellsarm-supplypu-supplysoc-supplyportsstartup-delay-usenable-active-highsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,aux-devssound-dai