=8:(N:X,R7 A10s hdmi tv-stick,2allwinner,r7-tv-dongleallwinner,sun5i-a10schosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0(c+.XZU jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-tve00c*+.X\U jdisabledframebuffer@202allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmi0c+-.UXa jdisabledaliasesq/soc@1c00000/ethernet@1c0b000{/soc@1c00000/serial@1c28000memorymemorycpuscpu@0cpu2arm,cortex-a8cclocks=clk@1c20050 2fixed-clockn6osc24Mclk@0 2fixed-clockosc32ksoc@1c00000 2simple-bus=system-control@1c00000#2allwinner,sun5i-a13-system-control0=sram@0 2mmio-sram =sram-section@8000>2allwinner,sun5i-a13-sram-a3-a4allwinner,sun4i-a10-sram-a3-a4@ jdisabledsram@10000 2mmio-sram =sram-section@062allwinner,sun5i-a13-sram-dallwinner,sun4i-a10-sram-d jdisabledsram@1d00000 2mmio-sram  = sram-section@082allwinner,sun5i-a13-sram-c1allwinner,sun4i-a10-sram-c1dma-controller@1c020002allwinner,sun4i-a10-dma cnand@1c030002allwinner,sun4i-a10-nand0%c ?ahbmod rxtx jdisabledspi@1c050002allwinner,sun4i-a10-spiP c$Eahbmodrxtx jdisabledspi@1c060002allwinner,sun4i-a10-spi` c%Fahbmod rxtx jdisabledtv-encoder@1c0a0002allwinner,sun4i-a10-tv-encoderc* jdisabledportendpoint@0ethernet@1c0b0002allwinner,sun4i-a10-emac7c" jdisabledmdio@1c0b0802allwinner,sun4i-a10-mdio jdisabledlcd-controller@1c0c0002allwinner,sun5i-a13-tcon,"lcdc+Z\ahbtcon-ch0tcon-ch1tcon-pixel-clock jdisabledportsport@0endpoint@0port@1endpoint@1.endpoint@2.mmc@1c0f0002allwinner,sun5i-a13-mmcc@ahbmmc jokayEdefaultS ] is mmc@1c100002allwinner,sun5i-a13-mmccAahbmmc!jokayEdefaultS ] i|mmc@1c110002allwinner,sun5i-a13-mmccBahbmmc" jdisabledusb@1c130002allwinner,sun4i-a10-musb0c&mcusb jdisabledphy@1c134002allwinner,sun5i-a13-usb-phy4Hphy_ctrlpmu1cMusb_phy"usb0_resetusb1_resetjokayusb@1c14000&2allwinner,sun5i-a13-ehcigeneric-ehci@'cusbjokayusb@1c14400&2allwinner,sun5i-a13-ohcigeneric-ohciD(cLusbjokaycrypto-engine@1c1500062allwinner,sun5i-a13-cryptoallwinner,sun4i-a10-cryptoP6cDahbmodspi@1c170002allwinner,sun4i-a10-spip c&Gahbmodrxtx jdisabledclock@1c20000c hosclosc2allwinner,sun5i-a10s-ccuinterrupt-controller@1c204002allwinner,sun4i-a10-icpinctrl@1c20800c5apbhosclosc 2allwinner,sun5i-a10s-pinctrl emac0@0X%PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27*emaci2c0@0%PB0PB1*i2c0i2c1@0 %PB15PB16*i2c1i2c2@0 %PB17PB18*i2c2ir0@0%PB4*ir0lcd_rgb565@0_%PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD19PD20PD21PD22PD23PD24PD25PD26PD27*lcd0lcd_rgb666@0h%PD2PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27*lcd0mmc0@0%PF0PF1PF2PF3PF4PF5*mmc03B mmc2@0.%PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15*mmc23Bmmc2-4bit@0%PC6PC7PC8PC9PC10PC11*mmc23Bnand-base0@06%PC0PC1PC2PC5PC8PC9PC10PC11PC12PC13PC14PC15*nand0nand-cs@0%PC4*nand0nand-rb@0%PC6*nand0spi2@0 %PE1PE2PE3*spi2spi2-cs0@0%PE0*spi2uart1@0 %PE10PE11*uart1uart1@1%PG3PG4*uart1uart2@0%PD2PD3*uart2uart2-cts-rts@0%PD4PD5*uart2uart3@0 %PG9PG10*uart3uart3-cts-rts@0 %PG11PG12*uart3pwm0%PB2*pwmuart0@0 %PB19PB20*uart0uart2@1 %PC18PC19*uart2emac0@1K%PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16*emacmmc1@0%PG3PG4PG5PG6PG7PG8*mmc13 spi2@1%PB12PB13PB14*spi2spi2_cs0@1%PB11*spi2mmc0_cd_pin@0%PG1*gpio_inB led_pins@0%PB2 *gpio_out3usb1_vbus_pin@0%PG13 *gpio_outtimer@1c20c002allwinner,sun4i-a10-timer cwatchdog@1c20c902allwinner,sun4i-a10-wdt ir@1c218002allwinner,sun4i-a10-irc6Hapbir@ jdisabledlradc@1c228002allwinner,sun4i-a10-lradc-keys( jdisabledcodec@1c22c00O2allwinner,sun4i-a10-codec,@c2_ apbcodecrxtx jdisabledeeprom@1c238002allwinner,sun4i-a10-sid8rtp@1c250002allwinner,sun5i-a13-tsP`serial@1c280002snps,dw-apb-uart€vc;jokayEdefaultSserial@1c284002snps,dw-apb-uart„vc< jdisabledserial@1c288002snps,dw-apb-uartˆvc= jdisabledserial@1c28c002snps,dw-apb-uartŒvc> jdisabledi2c@1c2ac002allwinner,sun4i-a10-i2c¬c8 jdisabledi2c@1c2b0002allwinner,sun4i-a10-i2c°c9 jdisabledi2c@1c2b4002allwinner,sun4i-a10-i2c´ c: jdisabledtimer@1c600002allwinner,sun5i-a13-hstimerRSc(display-frontend@1e00000%2allwinner,sun5i-a13-display-frontend/cYYT ahbmodram jdisabledportsport@1endpoint@0display-backend@1e60000$2allwinner,sun5i-a13-display-backend/c.XU ahbmodram jdisabledXportsport@0endpoint@0port@1endpoint@0hdmi@1c160002allwinner,sun5i-a10s-hdmi`: c-a ahbmodpll-0pll-1$ddc-txddc-rxaudio-tx jdisabledportsport@0endpointport@1pwm@1c20e002allwinner,sun5i-a10s-pwm c jdisableddisplay-engine$2allwinner,sun5i-a10s-display-engineahci-5v2regulator-fixedahci-5vLK@LK@"5  jdisabledusb0-vbus2regulator-fixed usb0-vbusLK@LK@"5   jdisabledusb1-vbus2regulator-fixed usb1-vbusLK@LK@"5  jokaySusb2-vbus2regulator-fixed usb2-vbusLK@LK@"5  jdisabledvcc3v02regulator-fixedvcc3v0--vcc3v32regulator-fixedvcc3v32Z2Z vcc5v02regulator-fixedvcc5v0LK@LK@leds 2gpio-ledsEdefaultSgreen:r7-tv-dongle:green:usrv @on #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0device_typereg#clock-cellsclock-frequencyclock-output-namesphandleinterrupts#dma-cellsclock-namesdmasdma-namesresetsremote-endpointallwinner,sramreset-namesallwinner,tcon-channelpinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpiosnon-removableinterrupt-namesphysphy-namesextcon#phy-cellsreg-namesusb1_vbus-supply#reset-cellsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-up#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthassigned-clocksassigned-clock-rates#pwm-cellsallwinner,pipelinesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiolabeldefault-state