8~(~pCompuLab CM-QS600#!qcom,apq8064-cm-qs600qcom,apq8064,chosen=serial0:115200n8aliases#I/soc/gsbi@16600000/serial@16640000memoryQmemory]reserved-memoryasmem@80000000] howcnss@8f000000]phoNcpuscpu@0 !qcom,kraitwqcom,kpss-acc-v1Qcpu]o_cpu@1 !qcom,kraitwqcom,kpss-acc-v1Qcpu]oacpu@2 !qcom,kraitwqcom,kpss-acc-v1Qcpu] occpu@3 !qcom,kraitwqcom,kpss-acc-v1Qcpu]  oel2-cache!cacheoidle-statesspc#!qcom,idle-state-spcarm,idle-state othermal-zonescpu-thermal0  *tripstrip07$CXpassivetrip17C Xcriticalcpu-thermal1  *ltripstrip07$CXpassivetrip17C Xcriticalcpu-thermal2  *tripstrip07$CXpassivetrip17C Xcriticalcpu-thermal3  *ltripstrip07$CXpassivetrip17C Xcriticalcpu-pmu!qcom,krait-pmu N clockscxo_board !fixed-clockYf$o.pxo_board !fixed-clockYfsleep_clk !fixed-clockYfo-hwmutex!qcom,sfpb-mutex v }osmem !qcom,smemsmd !qcom,smdmodem@0 N%  disabledq6@1 NZ  disableddsps@3 N @ disabledriva@6 N  disabledsmsm !qcom,smsm    @apps@0]oTmodem@1] N&q6@2] NYwcnss@3] NoMdsps@4] Nfirmwarescm!qcom,scm-apq8064( /coreiio-hwmon !iio-hwmonT;   soca !simple-buspinctrl@800000!qcom,apq8064-pinctrl]@GW Ncdefaultqo%sdc4-gpioso?pios*{gpio63gpio64gpio65gpio66gpio67gpio68sdc4sdcc1-pin-activeo8clk {sdc1_clkcmd {sdc1_cmd data {sdc1_data sdcc3-pin-activeclk {sdc3_clkcmd {sdc3_cmddata {sdc3_dataps_holdomux{gpio78ps_holdi2c1omux{gpio20gpio21gsbi1pinconf{gpio20gpio21i2c1_pins_sleepomux{gpio20gpio21gpiopinconf{gpio20gpio21gsbi1_uart_2pinsmux{gpio18gpio19gsbi1gsbi1_uart_4pinsmux{gpio18gpio19gpio20gpio21gsbi1i2c2omux{gpio24gpio25gsbi2pinconf{gpio24gpio25i2c2_pins_sleepomux{gpio24gpio25gpiopinconf{gpio24gpio25i2c3omux {gpio8gpio9gsbi3pinconf {gpio8gpio9i2c3_pins_sleepomux {gpio8gpio9gpiopinconf {gpio8gpio9i2c4omux{gpio12gpio13gsbi4pinconf{gpio12gpio13i2c4_pins_sleepomux{gpio12gpio13gpiopinconf{gpio12gpio13spi5_defaultopinmux{gpio51gpio52gpio54gsbi5pinmux_csgpio{gpio53pinconf{gpio51gpio52gpio54pinconf_cs{gpio53spi5_sleepopinmuxgpio{gpio51gpio52gpio53gpio54pinconf{gpio51gpio52gpio53gpio54i2c6o mux{gpio16gpio17gsbi6pinconf{gpio16gpio17i2c6_pins_sleepo!mux{gpio16gpio17gpiopinconf{gpio16gpio17gsbi6_uart_2pinsmux{gpio14gpio15gsbi6gsbi6_uart_4pinsmux{gpio14gpio15gpio16gpio17gsbi6gsbi7_uart_2pinso"mux{gpio82gpio83gsbi7gsbi7_uart_4pinsmux{gpio82gpio83gpio84gpio85gsbi7i2c7o#mux{gpio84gpio85gsbi7pinconf{gpio84gpio85i2c7_pins_sleepo$mux{gpio84gpio85gpiopinconf{gpio84gpio85riva-fm-active{gpio14gpio15riva_fmriva-bt-active{gpio16gpio17riva_btriva-wlan-active#{gpio64gpio65gpio66gpio67gpio68 riva_wlanhdmi-pinctrloImux{gpio70gpio71gpio72hdmipinconf_ddc{gpio70gpio71pinconf_hpd{gpio72card_detecto=mux{gpio26gpiopcie_pinmuxoHmux{gpio27gpioconf{gpio27 syscon@1200000!syscon] o interrupt-controller@2000000!qcom,msm-qgic2] otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$N]fclock-controller@2088000!qcom,kpss-acc-v1]oclock-controller@2098000!qcom,kpss-acc-v1] oclock-controller@20a8000!qcom,kpss-acc-v1] oclock-controller@20b8000!qcom,kpss-acc-v1] o power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2]opower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] o power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] o sps-sic-non-secure@12100000!syscon]ogsbi@12440000okay!qcom,gsbi-v1.0.0]D( /ifaceaserial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]E@ N(  /coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1qcdefaultsleep]F N(  /coreifaceokayf @eeprom@50 !atmel,24c02]P gsbi@12480000 disabled!qcom,gsbi-v1.0.0]H( /ifaceai2c@124a0000!qcom,i2c-qup-v1.1.1]Jqcdefaultsleep N(  /coreiface disabledgsbi@16200000 disabled!qcom,gsbi-v1.0.0] ( /ifaceai2c@16280000!qcom,i2c-qup-v1.1.1qcdefaultsleep]( N(  /coreiface disabledgsbi@16300000 disabled!qcom,gsbi-v1.0.0]0( /ifaceai2c@16380000!qcom,i2c-qup-v1.1.1qcdefaultsleep]8 N(  /coreiface disabledgsbi@1a200000 disabled!qcom,gsbi-v1.0.0] ( /ifaceaserial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]$  N(  /coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1]( Nqcdefaultsleep(  /coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0]P( /ifaceaserial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]TP N(  /coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1q !cdefaultsleep]X N(  /coreiface disabledgsbi@16600000ok!qcom,gsbi-v1.0.0]`( /ifaceaserial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]d` N(  /coreifaceokcdefaultq"i2c@16680000!qcom,i2c-qup-v1.1.1q#$cdefaultsleep]h N(  /coreiface disabledrng@1a500000 !qcom,prng]P( /coressbi@c00000 !qcom,ssbi] $pmic-arbiterpmic@1 !qcom,pm8821,%NLmpps@50!qcom,pm8821-mppqcom,ssbi-mpp]P NGWqcom,ssbi@500000 !qcom,ssbi]P $pmic-arbiterpmic@0 !qcom,pm8921,%NJo&gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpio]P`NGWohwlan-gpiosogpios{gpio43normal9mpps@50!qcom,pm8921-mppqcom,ssbi-mpp]PGW`Nrtc@11d!qcom,pm8921-rtc,&N']Fpwrkey@1c!qcom,pm8921-pwrkey],&N23U= xoadc@197!qcom,pm8921-adc] ^&Nroadc-channel@00]adc-channel@01]adc-channel@02]adc-channel@04]adc-channel@08]adc-channel@09] adc-channel@0a] adc-channel@0b] adc-channel@0c] adc-channel@0d] adc-channel@0e]adc-channel@0f]qfprom@700000 !qcom,qfprom]pacalib]o'backup_calib]o(clock-controller@900000!qcom,gcc-apq8064]@'(calibcalib_backupYo clock-controller@28000000!qcom,lcc-apq8064](Yclock-controller@4000000!qcom,mmcc-apq8064]YoAclock-controller@2011000!syscon]orpm@108000!qcom,rpm-apq8064] $Nackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccYoregulators!qcom,rpm-pm8921-regulators)*) )%*4*C+R+a+s1p((0o*s2oPs3B@\I>oFs4w@w@0o)s7  0o+s8l1l2l3.2Zo0l4B@w@o1l5)0-o:l6l7l8l9l10oQl11l12l14l15l16l17l18l21l22l23o4l24oOl25l26l27l28l29lvs1lvs2oRlvs3lvs4lvs5lvs6oGlvs7usb-switchhdmi-switchncpusb@12500000 !qcom,ci-hdrc]PP Nd( ~ /coreiface  @coreulpi!,&usb-phyok0otgo/ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy(-. /sleepref/por8C0O1o,usb@12520000 !qcom,ci-hdrc]RR N( ) ' /coreiface ) dcoreulpi!2&usb-phyokay0hosto3ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy8(-. /sleepref3porC0O4o2usb@12530000 !qcom,ci-hdrc]SS N( , * /coreiface , ecoreulpi!5&usb-phyokay0hosto6ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy8(-. /sleepref6porC0O4o5phy@1b400000!qcom,apq8064-sata-phy disabled]@[phy_mem( -/cfg8o7sata@29000000!qcom,apq8064-ahcigeneric-ahci disabled]) N(( ; . )/slave_ifaceifacebusrxoobcore_pmalive !7 &sata-phyedma@12402000!qcom,bam-v1.3.0]@  Nb( n/bam_clkwo9dma@12182000!qcom,bam-v1.3.0]  N`( p/bam_clkwo;dma@121c2000!qcom,bam-v1.3.0]  N_( q/bam_clkwo>amba !simple-busasdcc@12400000okay!arm,pl18xarm,primecellcdefaultq8]@  Nhcmd_irq( x n/mclkapb_pclk99txrx:)sdcc@12180000!arm,pl18xarm,primecellokay]  Nfcmd_irq( z p/mclkapb_pclk q;;txrx<cdefaultq= %sdcc@121c0000!arm,pl18xarm,primecellokay]  Necmd_irq( { q/mclkapb_pclkl>>txrxcdefaultq?<<$@syscon@1a400000!qcom,tcsr-apq8064syscon]@oadreno-3xx@4300000!qcom,adreno-3xx]0[kgsl_3d0_reg_memory NP kgsl_3d0_irq)/core_clkiface_clkmem_clkmem_iface_clk (AGAA!A/;BBBBBBBBBB B B B B BBBBBBBBBBBBBBBBBBCCCCCCCCCC C C C C CCCCCCCCCCCCCCCCCCqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0Btqcom,gpu-pwrlevel@1Bsyscon@5700000!syscon]ppoEmdss_dsi@4700000!qcom,mdss-dsi-ctrlPMDSS DSI CTRL->0 NR]p [dsi_ctrl8(AAAA9ATAjAXD/iface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk ASAWA8Ai VDDDDmE!Dportsport@0]endpointport@1]endpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960Y8]ppp\"[dsi_plldsi_phydsi_phy_regulator /iface_clk(AoDiommu@7500000!qcom,apq8064-iommuy/smmu_pclkiommu_clk(A A]PN?@oKiommu@7600000!qcom,apq8064-iommuy/smmu_pclkiommu_clk(A A]`N=>oLiommu@7c00000!qcom,apq8064-iommuy/smmu_pclkiommu_clk(A A!]NEFoBiommu@7d00000!qcom,apq8064-iommuy/smmu_pclkiommu_clk(A A!]NoCpci@1b500000!qcom,pcie-apq8064snps,dw-pcie ]PP `[dbielbiparfconfigQpci0a Nmsi$%&'( + . -/coreifacephy( l k j i haxiahbporpciphyokFG<qHcdefault %hdmi-tx@4a00000!qcom,hdmi-tx-8960cdefaultqI][core_physical NO(A>A A*/core_clkmaster_iface_clkslave_iface_clk!J &hdmi-phyportsport@0]endpointport@1]endpointhdmi-phy@4a00400!qcom,hdmi-phy-8960]`[hdmi_phyhdmi_pll(A/slave_iface_clk8oJmdp@5100000 !qcom,mdp4] NK0(AMAAANA_A`3/core_clkiface_clkbus_clklut_clkhdmi_clktv_clk ;KKLLportsport@0]endpointport@1]endpointport@2]endpointport@3]endpointriva-pil@3204000!qcom,riva-pil]   @ [ccudxepmu^M wdogfatalNFO)) disabledoSiris !qcom,wcn3660(./xo61CPQQ^Rsmd-edge N Privawcnss !qcom,wcnss lWCNSS_CTRL~Sbt!qcom,wcnss-btwifi!qcom,wcnss-wlanNtxrxT T tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecell]( /apb_pclkportendpointUoWtpiu@1a03000!!arm,coresight-tpiuarm,primecell]0( /apb_pclkportendpointVoXreplicator!arm,coresight-replicator( /apb_pclkportsport@0]endpointWoUport@1]endpointXoVport@2]endpointYo^funnel@1a04000#!arm,coresight-funnelarm,primecell]@( /apb_pclkportsport@0]endpointZo`port@1]endpoint[obport@4]endpoint\odport@5]endpoint]ofport@8]endpoint^oYetm@1a1c000"!arm,coresight-etm3xarm,primecell]( /apb_pclk_portendpoint`oZetm@1a1d000"!arm,coresight-etm3xarm,primecell]( /apb_pclkaportendpointbo[etm@1a1e000"!arm,coresight-etm3xarm,primecell]( /apb_pclkcportendpointdo\etm@1a1f000"!arm,coresight-etm3xarm,primecell]( /apb_pclkeportendpointfo]v3p3!regulator-fixed PCIE V3P32Z2Zpo<pwrseqa !simple-bussdcc4_pwrseqcdefaultqg!mmc-pwrseq-simple h+o@ #address-cells#size-cellsmodelcompatibleinterrupt-parentstdout-pathserial0device_typeregrangesno-mapphandleenable-methodnext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modepinctrl-1pagesizeqcom,controller-typepower-sourceallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_lvs1_3_6-supplyvin_lvs2-supplyvin_lvs4_5_7-supplyvdd_l1_l2_l12_l18-supplyvdd_l24-supplyvdd_l25-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosmmc-pwrseqqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvdda-supplyvdda_phy-supplyvdda_refclk-supplyperst-gpiovddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesslave-moderemote-endpointcpuregulator-namereset-gpios