8(BRIoTboard i.MX6S !riot,imx6s-riotboardfsl,imx6dlchosen,serial1:115200n8memory8memoryaliases'D/soc/aips-bus@2100000/ethernet@2188000&N/soc/aips-bus@2000000/flexcan@2090000&S/soc/aips-bus@2000000/flexcan@2094000#X/soc/aips-bus@2000000/gpio@209c000#^/soc/aips-bus@2000000/gpio@20a0000#d/soc/aips-bus@2000000/gpio@20a4000#j/soc/aips-bus@2000000/gpio@20a8000#p/soc/aips-bus@2000000/gpio@20ac000#v/soc/aips-bus@2000000/gpio@20b0000#|/soc/aips-bus@2000000/gpio@20b4000"/soc/aips-bus@2100000/i2c@21a0000"/soc/aips-bus@2100000/i2c@21a4000"/soc/aips-bus@2100000/i2c@21a8000/soc/ipu@2400000$/soc/aips-bus@2100000/usdhc@2190000$/soc/aips-bus@2100000/usdhc@2194000$/soc/aips-bus@2100000/usdhc@2198000$/soc/aips-bus@2100000/usdhc@219c0006/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000%/soc/aips-bus@2100000/serial@21e8000%/soc/aips-bus@2100000/serial@21ec000%/soc/aips-bus@2100000/serial@21f0000%/soc/aips-bus@2100000/serial@21f40005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20080005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@200c0005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20100005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000%/soc/aips-bus@2000000/usbphy@20c9000%/soc/aips-bus@2000000/usbphy@20ca000"/soc/aips-bus@2100000/i2c@21f8000clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6tempmon!fsl,imx6q-tempmon )14@Qldb!fsl,imx6q-ldbfsl,imx53-ldbX \disabled0Q!"'((cdi0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0o \disabledport@0oendpointsKport@1oendpointsOlvds-channel@1o \disabledport@0oendpointsLport@1oendpoints Ppmu!arm,cortex-a9-pmu )^soc !simple-busdma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbho 0)    gpmi0gpmi1gpmi2gpmi3Qj gpmi-nand@112000!fsl,imx6q-gpmi-nando @ gpmi-nandbch )bch(Q0cgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bch rx-tx \disabledhdmi@120000o )sXQ{| ciahbisfr\okay!fsl,imx6dl-hdmi port@0oendpoints Iport@1oendpoints Mgpu@130000 !vivante,gco@ ) QzJcbuscoreshadergpu@134000 !vivante,gco@@ ) Qy cbuscoretimer@a00600!arm,cortex-a9-twd-timero  ) Qinterrupt-controller@a01000!arm,cortex-a9-gicol2-cache@a02000!arm,pl310-cacheo  )\! - =NQpcie@1ffc000!fsl,imx6q-pciesnps,dw-pcieo@ dbiconfig8pcib0l )xmsiv{zyxQcpciepcie_buspcie_phy \disabledaips-bus@2000000!fsl,aips-bussimple-busospba-bus@2000000!fsl,spba-bussimple-busospdif@2004000!fsl,imx35-spdifo@@ )4 rxtxPQkv>:ccorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba \disabledecspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspio@ )Qppcipgper rxtx \disabledecspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspio@ ) Qqqcipgper rxtx \disabledecspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspio@ )!Qrrcipgper rxtx \disabledecspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspio@@ )"Qsscipgper   rxtx \disabledserial@2020000!fsl,imx6q-uartfsl,imx21-uarto@ )Qcipgper rxtx\okaydefaultesai@2024000!fsl,imx35-esaio@@ )3(Qvccorememextalfsysspba rxtx \disabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssio@ ).Q cipgbaud %&rxtx\okayYssi@202c000!fsl,imx6q-ssifsl,imx51-ssio@ )/Q cipgbaud )*rxtx \disabledssi@2030000!fsl,imx6q-ssifsl,imx51-ssio@ )0Q cipgbaud -.rxtx \disabledasrc@2034000!fsl,imx53-asrco@@ )2Qkcmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxc\okayspba@203c000o@vpu@2040000!fsl,imx6dl-vpucnm,coda960o)  bitjpegQcperahbaipstz@207c000o@pwm@2080000!fsl,imx6q-pwmfsl,imx27-pwmo@ )SQ>cipgper\okaydefaultpwm@2084000!fsl,imx6q-pwmfsl,imx27-pwmo@@ )TQ>cipgper\okaydefaultpwm@2088000!fsl,imx6q-pwmfsl,imx27-pwmo@ )UQ>cipgper\okaydefaultpwm@208c000!fsl,imx6q-pwmfsl,imx27-pwmo@ )VQ>cipgper\okaydefaultflexcan@2090000!fsl,imx6q-flexcano @ )nQlmcipgper \disabledflexcan@2094000!fsl,imx6q-flexcano @@ )oQnocipgper \disabledgpt@2098000!fsl,imx6dl-gpto @ )7Qwxcipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpioo @)BC@   {y~zP+SD2_WPSD2_CDI2C3_SCLI2C3_SDAI2C4_SCLI2C4_SDAPWM3+gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpioo @)DEJIHGFEDOvuqgpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpioo @@)FG@ai cQE+USB_OTG_VBUSUART3_TXDUART3_RXDEIM_D28-gpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpioo @)HI     '8=.+UART4_TXDUART4_RXDUART5_TXDUART5_RXDGPIO4_16GPIO4_17GPIO4_18GPIO4_19CSPI3_CLKCSPI3_MOSICSPI3_MISOCSPI3_CS0CSPI3_CS1GPIO4_26GPIO4_27CSPI3_RDYPWM1PWM2GPIO4_31gpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpioo @)JKxML/ 9%$#&v+EIM_A25GPIO5_05GPIO5_06GPIO5_07GPIO5_08CSPI2_CS1CSPI2_MOSICSPI2_MISOCSPI2_CS0CSPI2_CLK5gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpioo @)LM K   Ngpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpioo @@)NO   ,+SD3_CDSD3_WP1kpp@20b8000!fsl,imx6q-kppfsl,imx21-kppo @ )RQ> \disabledwdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdto @ )PQwdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdto @ )QQ \disabledccm@20c4000!fsl,imx6q-ccmo @@)WXanatop@20c8000#!fsl,imx6q-anatopsysconsimple-buso $)16regulator-1p1!fsl,anatop-regulator;vdd1p1JB@bOz 5regulator-3p0!fsl,anatop-regulator;vdd3p0J*b0z ( 3@regulator-2p5!fsl,anatop-regulator;vdd2p5J"Ub)0z0 +xregulator-vddcore!fsl,anatop-regulator;vddarmJ b z@p-D  Rregulator-vddpu!fsl,anatop-regulator;vddpuJ b [@ p-D  regulator-vddsoc!fsl,anatop-regulator;vddsocJ b z@p-D  Susbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyo  ),Qw&usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyo  )-Qw*snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdo @snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4)snvs-poweroff!syscon-poweroff8`` \disabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000o @ )8epit@20d4000o @@ )9src@20d8000!fsl,imx6q-srcfsl,imx51-srco @)[`gpc@20dc000!fsl,imx6q-gpco @)YZQ>cipgpgcpower-domain@0opower-domain@1o0QzJyiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfdo8mux-controller !mmio-mux8448 (( ipu1_csi0_mux !video-muxport@0oendpoints8port@1oendpoints:port@2oendpoints<port@3oendpoints>port@4oendpointport@5oendpoints Gipu1_csi1_mux !video-muxport@0oendpoints!9port@1oendpoints";port@2oendpoints#=port@3oendpoints$?port@4oendpointport@5oendpoints%Hiomuxc@20e0000!fsl,imx6dl-iomuxco@defaultimx6-riotboardaudmuxgrpx0t0x|0 07ecspi1grp`DHLecspi2grpxecspi3grpx enetgrp00000000000 0$0(0 @P04< ,i2c1grp0l@h@3i2c2grp0P8p@dLt@6i2c3grp00x@4|@i2c4grp08@< @Fledgrp04tDXpwm1grppwm2grp  pwm3grppwm4grpuart1grp0L`Pduart2grp0l<p@ Buart3grp0d4h8 Cuart4grp0D,X@ Duart5grp0H0\D EusbotggrpHpY\,X( )usdhc2grppY 0YpYpYpYpY,$.usdhc3grppY  4YpYpYpY pY($ 0usdhc4grp<$pY8 8Y@(pYD,pYH0pYL4pYlTpY2dcic@20e4000o@@ )|dcic@20e8000o@ )}sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdmao@ )Qcipgahbimx/sdma/sdma-imx6q.binpxp@20f0000o@ )bepdc@20f4000o@@ )aaips-bus@2100000!fsl,aips-bussimple-busocaam@2100000 !fsl,sec-v4.0o  Qcmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ringo )ijr1@2000!fsl,sec-v4.0-job-ringo  )jaipstz@217c000o@usb@2184000!fsl,imx6q-usbfsl,imx27-usbo@ )+Q &'$5I\okay](default)i~otgusb@2184200!fsl,imx6q-usbfsl,imx27-usboB )(Q *'~host$5I\okayiusb@2184400!fsl,imx6q-usbfsl,imx27-usboD ))Q'~host$5I \disabledusb@2184600!fsl,imx6q-usbfsl,imx27-usboF )*Q'~host$5I \disabledusbmisc@2184800!fsl,imx6q-usbmiscoHQ'ethernet@2188000!fsl,imx6q-feco@ int0pps+wQuu cipgahbptp\okaydefault,rgmii -mlb@218c000o@$)5u~usdhc@2190000!fsl,imx6q-usdhco@ )Q cipgahbper \disabledusdhc@2194000!fsl,imx6q-usdhco@@ )Q cipgahbper\okaydefault. + +/usdhc@2198000!fsl,imx6q-usdhco@ )Q cipgahbper\okaydefault0 1 1/usdhc@219c000!fsl,imx6q-usdhco@ )Q cipgahbper\okaydefault2/ i2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2co@ )$Q}\okaydefault3sgtl5000@a !fsl,sgtl5000o Q4#/Zpf0100@8 !fsl,pfuze100o5)regulatorssw1abJb8zsw1cJb8zsw2J 5b2Zzsw3aJb"zsw3bJb"zsw4Jb"zswbstJLK@bN0vsnvsJ`b-zvrefddr0zvgen1J 5bvgen2J 5bzvgen3Jw@b2Zvgen4Jw@b2Zzvgen5Jw@b2Zzvgen6Jw@b2Zzi2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2co@@ )%Q~\okaydefault6 i2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2co@ )&Q \disabledromcp@21ac000o@mmdc@21b0000!fsl,imx6q-mmdco@mmdc@21b4000o@@weim@21b8000!fsl,imx6q-weimo@ )QB \disabledocotp@21bc000!fsl,imx6q-ocotpsyscono@Qtzasc@21d0000o@ )ltzasc@21d4000o@@ )maudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxo@\okaydefault7mipi@21dc000!fsl,imx6-mipi-csi2o@)deQa cdphyrefpix \disabledport@1oendpoint@0os8endpoint@1os9!port@2oendpoint@0os:endpoint@1os;"port@3oendpoint@0os<endpoint@1os=#port@4oendpoint@0os>endpoint@1os?$mipi@21e0000o@ \disabledportsport@0oendpoints@Jport@1oendpointsANvdoa@21e4000!fsl,imx6q-vdoao@@ )Qserial@21e8000!fsl,imx6q-uartfsl,imx21-uarto@ )Qcipgper rxtx\okaydefaultBserial@21ec000!fsl,imx6q-uartfsl,imx21-uarto@ )Qcipgper rxtx\okaydefaultCserial@21f0000!fsl,imx6q-uartfsl,imx21-uarto@ )Qcipgper  rxtx\okaydefaultDserial@21f4000!fsl,imx6q-uartfsl,imx21-uarto@@ )Qcipgper !"rxtx\okaydefaultEi2c@21f8000!fsl,imx6q-i2cfsl,imx21-i2co@ )#Qt\okaydefaultFipu@2400000!fsl,imx6q-ipuo@@)Q cbusdi0di1port@0oTendpointsG port@1oUendpointsH%port@2oVendpoint@0oendpoint@1osI endpoint@2osJ@endpoint@3osKendpoint@4osLport@3oWendpoint@0oendpoint@1osM endpoint@2osNAendpoint@3osOendpoint@4osP sram@900000 !mmio-sramoQcpuscpu@0!arm,cortex-a98cpuoRQc2  0t2  l(Qh)carmpll2_pfd2_396msteppll1_swpll1_sysRScpu@1!arm,cortex-a98cpuoRQc2  0t2  l(Qh)carmpll2_pfd2_396msteppll1_swpll1_sysRScapture-subsystem!fsl,imx-capture-subsystemTUdisplay-subsystem!fsl,imx-display-subsystemVWmemory@10000000o@leds !gpio-ledsdefaultXuser1user1 5on heartbeatuser2user2 -offsound!fsl,imx-audio-sgtl5000imx6-riotboard-sgtl5000Y Z8MIC_INMic JackMic JackMic BiasHeadphone JackHP_OUT#0regulator-2p5v!regulator-fixed;2P5VJ&%b&%4regulator-3p3v!regulator-fixed;3P3VJ2Zb2Z/regulator-usbotgvbus!regulator-fixed ;usb_otg_vbusJLK@bLK@ =-( #address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3#clock-cellsclock-frequencyinterrupt-parentinterruptsfsl,tempmonfsl,tempmon-dataclocksgprstatusclock-namesregremote-endpointphandlerangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namesddc-i2c-buspower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridebus-rangenum-lanesinterrupt-map-maskinterrupt-mappinctrl-namespinctrl-0#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesgpio-line-namesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,anatopregmapvalue#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modephy-reset-gpiosfsl,err006687-workaround-presentbus-widthcd-gpioswp-gpiosvmmc-supplynon-removableVDDA-supplyVDDIO-supplyregulator-boot-onfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latency#cooling-cellsarm-supplypu-supplysoc-supplyportslabeldefault-statelinux,default-triggerssi-controlleraudio-codecaudio-routingmux-int-portmux-ext-portgpio