From: Ralf Baechle <ralf@linux-mips.org>
o Remove old unused header files
o Update the VINO video driver to something that's vaguely working
o Bug fixes for the IP22 Zilog driver
o Fix use of config.h
Signed-off-by: Andrew Morton <akpm@osdl.org>
---
/dev/null | 274 -----------------
25-akpm/arch/mips/Kconfig | 3
25-akpm/arch/mips/configs/ip22_defconfig | 61 +++
25-akpm/arch/mips/defconfig | 61 +++
25-akpm/arch/mips/sgi-ip22/ip22-nvram.c | 2
25-akpm/arch/mips/sgi-ip22/ip22-setup.c | 6
25-akpm/drivers/media/video/Kconfig | 3
25-akpm/drivers/media/video/vino.c | 442 ++++++++++++++++------------
25-akpm/drivers/media/video/vino.h | 176 ++++++-----
25-akpm/drivers/scsi/wd33c93.h | 2
25-akpm/drivers/serial/ip22zilog.c | 118 ++-----
25-akpm/drivers/video/console/newport_con.c | 86 ++---
25-akpm/include/asm-mips/sgi/sgi.h | 4
25-akpm/include/video/newport.h | 36 --
14 files changed, 568 insertions(+), 706 deletions(-)
diff -puN arch/mips/configs/ip22_defconfig~mips-sgi-ip22-updates arch/mips/configs/ip22_defconfig
--- 25/arch/mips/configs/ip22_defconfig~mips-sgi-ip22-updates 2005-01-29 11:25:53.124793112 -0800
+++ 25-akpm/arch/mips/configs/ip22_defconfig 2005-01-29 11:25:53.148789464 -0800
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc2
-# Sun Nov 21 14:11:59 2004
+# Linux kernel version: 2.6.11-rc2
+# Wed Jan 26 02:49:04 2005
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
@@ -86,16 +86,16 @@ CONFIG_SGI_IP22=y
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_ARC=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
+CONFIG_ARC32=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_ARC32=y
-# CONFIG_FB is not set
CONFIG_ARC_CONSOLE=y
CONFIG_ARC_PROMLIB=y
@@ -139,6 +139,19 @@ CONFIG_CPU_HAS_SYNC=y
CONFIG_MMU=y
#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PC-card bridges
+#
+
+#
+# PCI Hotplug Support
+#
+
+#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
@@ -154,6 +167,7 @@ CONFIG_TRAD_SIGNALS=y
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
@@ -173,9 +187,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
CONFIG_CDROM_PKTCDVD=m
@@ -189,6 +205,7 @@ CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
+CONFIG_ATA_OVER_ETH=m
#
# ATA/ATAPI/MFM/RLL support
@@ -223,13 +240,13 @@ CONFIG_SCSI_CONSTANTS=y
#
CONFIG_SCSI_SPI_ATTRS=m
# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
#
# SCSI low-level drivers
#
CONFIG_SGIWD93_SCSI=y
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_QLOGIC_1280_1040 is not set
# CONFIG_SCSI_DEBUG is not set
#
@@ -390,8 +407,6 @@ CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
#
# IPv6: Netfilter Configuration
@@ -470,6 +485,7 @@ CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
+# CONFIG_CLS_U32_MARK is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
# CONFIG_NET_CLS_ACT is not set
@@ -560,6 +576,7 @@ CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=m
#
@@ -626,7 +643,6 @@ CONFIG_SGI_DS1286=m
#
# Ftape, the floppy tape device driver
#
-# CONFIG_AGP is not set
# CONFIG_DRM is not set
CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
@@ -658,6 +674,7 @@ CONFIG_MAX_RAW_DEVS=256
#
# Graphics support
#
+# CONFIG_FB is not set
#
# Console display driver support
@@ -675,6 +692,7 @@ CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_SGI_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
@@ -688,11 +706,25 @@ CONFIG_LOGO_SGI_CLUT224=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+
+#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
# File systems
#
CONFIG_EXT2_FS=m
@@ -797,7 +829,7 @@ CONFIG_SMB_NLS_REMOTE="cp437"
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_XATTR is not set
-# CONFIG_CIFS_POSIX is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set
CONFIG_CODA_FS=m
# CONFIG_CODA_FS_OLD_API is not set
@@ -868,6 +900,11 @@ CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
@@ -910,10 +947,14 @@ CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_TEST=m
#
+# Hardware crypto devices
+#
+
+#
# Library routines
#
# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC32 is not set
+CONFIG_CRC32=m
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
diff -puN arch/mips/defconfig~mips-sgi-ip22-updates arch/mips/defconfig
--- 25/arch/mips/defconfig~mips-sgi-ip22-updates 2005-01-29 11:25:53.125792960 -0800
+++ 25-akpm/arch/mips/defconfig 2005-01-29 11:25:53.150789160 -0800
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc2
-# Sun Nov 21 14:11:54 2004
+# Linux kernel version: 2.6.11-rc2
+# Wed Jan 26 02:48:59 2005
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
@@ -86,16 +86,16 @@ CONFIG_SGI_IP22=y
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_ARC=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
+CONFIG_ARC32=y
CONFIG_BOOT_ELF32=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_ARC32=y
-# CONFIG_FB is not set
CONFIG_ARC_CONSOLE=y
CONFIG_ARC_PROMLIB=y
@@ -139,6 +139,19 @@ CONFIG_CPU_HAS_SYNC=y
CONFIG_MMU=y
#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PC-card bridges
+#
+
+#
+# PCI Hotplug Support
+#
+
+#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
@@ -154,6 +167,7 @@ CONFIG_TRAD_SIGNALS=y
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
@@ -173,9 +187,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
CONFIG_CDROM_PKTCDVD=m
@@ -189,6 +205,7 @@ CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
+CONFIG_ATA_OVER_ETH=m
#
# ATA/ATAPI/MFM/RLL support
@@ -223,13 +240,13 @@ CONFIG_SCSI_CONSTANTS=y
#
CONFIG_SCSI_SPI_ATTRS=m
# CONFIG_SCSI_FC_ATTRS is not set
+CONFIG_SCSI_ISCSI_ATTRS=m
#
# SCSI low-level drivers
#
CONFIG_SGIWD93_SCSI=y
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_QLOGIC_1280_1040 is not set
# CONFIG_SCSI_DEBUG is not set
#
@@ -390,8 +407,6 @@ CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
#
# IPv6: Netfilter Configuration
@@ -470,6 +485,7 @@ CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
+# CONFIG_CLS_U32_MARK is not set
CONFIG_NET_CLS_RSVP=m
CONFIG_NET_CLS_RSVP6=m
# CONFIG_NET_CLS_ACT is not set
@@ -560,6 +576,7 @@ CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=m
#
@@ -626,7 +643,6 @@ CONFIG_SGI_DS1286=m
#
# Ftape, the floppy tape device driver
#
-# CONFIG_AGP is not set
# CONFIG_DRM is not set
CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
@@ -658,6 +674,7 @@ CONFIG_MAX_RAW_DEVS=256
#
# Graphics support
#
+# CONFIG_FB is not set
#
# Console display driver support
@@ -675,6 +692,7 @@ CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_SGI_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
@@ -688,11 +706,25 @@ CONFIG_LOGO_SGI_CLUT224=y
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+
+#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
# File systems
#
CONFIG_EXT2_FS=m
@@ -797,7 +829,7 @@ CONFIG_SMB_NLS_REMOTE="cp437"
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_XATTR is not set
-# CONFIG_CIFS_POSIX is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set
CONFIG_CODA_FS=m
# CONFIG_CODA_FS_OLD_API is not set
@@ -868,6 +900,11 @@ CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
@@ -910,10 +947,14 @@ CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_TEST=m
#
+# Hardware crypto devices
+#
+
+#
# Library routines
#
# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC32 is not set
+CONFIG_CRC32=m
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
diff -puN arch/mips/Kconfig~mips-sgi-ip22-updates arch/mips/Kconfig
--- 25/arch/mips/Kconfig~mips-sgi-ip22-updates 2005-01-29 11:25:53.126792808 -0800
+++ 25-akpm/arch/mips/Kconfig 2005-01-29 11:25:53.154788552 -0800
@@ -416,6 +416,9 @@ config NEC_OSPREY
config SGI_IP22
bool "Support for SGI IP22 (Indy/Indigo2)"
+ select ARC
+ select ARC32
+ select BOOT_ELF32
select DMA_NONCOHERENT
select IP22_CPU_SCACHE
select IRQ_CPU
diff -puN arch/mips/sgi-ip22/ip22-nvram.c~mips-sgi-ip22-updates arch/mips/sgi-ip22/ip22-nvram.c
--- 25/arch/mips/sgi-ip22/ip22-nvram.c~mips-sgi-ip22-updates 2005-01-29 11:25:53.128792504 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-nvram.c 2005-01-29 11:25:53.150789160 -0800
@@ -26,7 +26,7 @@
#define EEPROM_DATO 0x08 /* Data out */
#define EEPROM_DATI 0x10 /* Data in */
-/* We need to use this functions early... */
+/* We need to use these functions early... */
#define delay() ({ \
int x; \
for (x=0; x<100000; x++) __asm__ __volatile__(""); })
diff -puN arch/mips/sgi-ip22/ip22-setup.c~mips-sgi-ip22-updates arch/mips/sgi-ip22/ip22-setup.c
--- 25/arch/mips/sgi-ip22/ip22-setup.c~mips-sgi-ip22-updates 2005-01-29 11:25:53.130792200 -0800
+++ 25-akpm/arch/mips/sgi-ip22/ip22-setup.c 2005-01-29 11:25:53.151789008 -0800
@@ -120,9 +120,8 @@ static int __init ip22_setup(void)
}
#endif
-#ifdef CONFIG_VT
-#ifdef CONFIG_SGI_NEWPORT_CONSOLE
- if (ctype && *ctype == 'g'){
+#if defined(CONFIG_VT) && defined(CONFIG_SGI_NEWPORT_CONSOLE)
+ {
ULONG *gfxinfo;
ULONG * (*__vec)(void) = (void *) (long)
*((_PULONG *)(long)((PROMBLOCK)->pvector + 0x20));
@@ -138,7 +137,6 @@ static int __init ip22_setup(void)
}
}
#endif
-#endif
return 0;
}
diff -puN drivers/media/video/Kconfig~mips-sgi-ip22-updates drivers/media/video/Kconfig
--- 25/drivers/media/video/Kconfig~mips-sgi-ip22-updates 2005-01-29 11:25:53.131792048 -0800
+++ 25-akpm/drivers/media/video/Kconfig 2005-01-29 11:25:53.164787032 -0800
@@ -146,7 +146,8 @@ config TUNER_3036
config VIDEO_VINO
tristate "SGI Vino Video For Linux (EXPERIMENTAL)"
- depends on EXPERIMENTAL && VIDEO_DEV && SGI
+ depends on VIDEO_DEV && I2C && SGI_IP22 && EXPERIMENTAL
+ select I2C_ALGO_SGI
help
Say Y here to build in support for the Vino video input system found
on SGI Indy machines.
diff -puN drivers/media/video/vino.c~mips-sgi-ip22-updates drivers/media/video/vino.c
--- 25/drivers/media/video/vino.c~mips-sgi-ip22-updates 2005-01-29 11:25:53.133791744 -0800
+++ 25-akpm/drivers/media/video/vino.c 2005-01-29 11:25:53.163787184 -0800
@@ -1,267 +1,347 @@
-/* $Id: vino.c,v 1.5 1999/10/09 00:01:14 ralf Exp $
- * drivers/char/vino.c
+/*
+ * (incomplete) Driver for the VINO (Video In No Out) system found in SGI Indys.
*
- * (incomplete) Driver for the Vino Video input system found in SGI Indys.
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License version 2 as published by the Free Software Foundation.
*
- * Copyright (C) 1999 Ulf Carlsson (ulfc@bun.falkenberg.se)
- *
- * This isn't complete yet, please don't expect any video until I've written
- * some more code.
+ * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/mm.h>
+#include <linux/slab.h>
+#include <linux/wrapper.h>
#include <linux/errno.h>
+#include <linux/irq.h>
+#include <linux/delay.h>
#include <linux/videodev.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-sgi.h>
#include <asm/addrspace.h>
#include <asm/system.h>
+#include <asm/bootinfo.h>
+#include <asm/pgtable.h>
+#include <asm/paccess.h>
+#include <asm/io.h>
+#include <asm/sgi/ip22.h>
+#include <asm/sgi/hpc3.h>
+#include <asm/sgi/mc.h>
#include "vino.h"
+/* debugging? */
+#if 1
+#define DEBUG(x...) printk(x);
+#else
+#define DEBUG(x...)
+#endif
+
+
+/* VINO ASIC registers */
+struct sgi_vino *vino;
+
+static const char *vinostr = "VINO IndyCam/TV";
+static int threshold_a = 512;
+static int threshold_b = 512;
+
struct vino_device {
struct video_device vdev;
+#define VINO_CHAN_A 1
+#define VINO_CHAN_B 2
+ int chan;
+};
- unsigned long chan;
-#define VINO_CHAN_A 0
-#define VINO_CHAN_B 1
-
- unsigned long flags;
-#define VINO_DMA_ACTIVE (1<<0)
+struct vino_client {
+ struct i2c_client *driver;
+ int owner;
};
-/* We can actually receive TV and IndyCam input at the same time. Believe it or
- * not..
- */
-static struct vino_device vino[2];
+struct vino_video {
+ struct vino_device chA;
+ struct vino_device chB;
+
+ struct vino_client decoder;
+ struct vino_client camera;
+
+ struct semaphore input_lock;
+
+ /* Loaded into VINO descriptors to clear End Of Descriptors table
+ * interupt condition */
+ unsigned long dummy_page;
+ unsigned int dummy_buf[4] __attribute__((aligned(8)));
+};
-/* Those registers have to be accessed by either *one* 64 bit write or *one* 64
- * bit read. We need some asm to fix this. We can't use mips3 as standard
- * because we just save 32 bits at context switch.
- */
+static struct vino_video *Vino;
-static __inline__ unsigned long long vino_reg_read(unsigned long addr)
+unsigned i2c_vino_getctrl(void *data)
{
- unsigned long long ret __attribute__ ((aligned (64)));
- unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
- unsigned long flags;
-
- save_and_cli(flags);
- __asm__ __volatile__(
- ".set\tmips3\n\t"
- ".set\tnoat\n\t"
- "ld\t$1,(%0)\n\t"
- "sd\t$1,(%1)\n\t"
- ".set\tat\n\t"
- ".set\tmips0"
- :
- :"r" (virt_addr),
- "r" (&ret)
- :"$1");
- restore_flags(flags);
-
- return ret;
+ return vino->i2c_control;
}
-static __inline__ void vino_reg_write(unsigned long long value,
- unsigned long addr)
+void i2c_vino_setctrl(void *data, unsigned val)
{
- unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
- unsigned long flags;
+ vino->i2c_control = val;
+}
- /* we might lose the upper parts of the registers which are not saved
- * if there comes an interrupt in our way, play safe */
+unsigned i2c_vino_rdata(void *data)
+{
+ return vino->i2c_data;
+}
- save_and_cli(flags);
- __asm__ __volatile__(
- ".set\tmips3\n\t"
- ".set\tnoat\n\t"
- "ld\t$1,(%0)\n\t"
- "sd\t$1,(%1)\n\t"
- ".set\tat\n\t"
- ".set\tmips0"
- :
- :"r" (&value),
- "r" (virt_addr)
- :"$1");
- restore_flags(flags);
-}
-
-static __inline__ void vino_reg_and(unsigned long long value,
- unsigned long addr)
-{
- unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
- unsigned long flags;
-
- save_and_cli(flags);
- __asm__ __volatile__(
- ".set\tmips3\n\t"
- ".set\tnoat\n\t"
- "ld\t$1,(%0)\n\t"
- "ld\t$2,(%1)\n\t"
- "and\t$1,$1,$2\n\t"
- "sd\t$1,(%0)\n\t"
- ".set\tat\n\t"
- ".set\tmips0"
- :
- :"r" (virt_addr),
- "r" (&value)
- :"$1","$2");
- restore_flags(flags);
-}
-
-static __inline__ void vino_reg_or(unsigned long long value,
- unsigned long addr)
-{
- unsigned long virt_addr = KSEG1ADDR(addr + VINO_BASE);
- unsigned long flags;
-
- save_and_cli(flags);
- __asm__ __volatile__(
- ".set\tmips3\n\t"
- ".set\tnoat\n\t"
- "ld\t$1,(%0)\n\t"
- "ld\t$2,(%1)\n\t"
- "or\t$1,$1,$2\n\t"
- "sd\t$1,(%0)\n\t"
- ".set\tat\n\t"
- ".set\tmips0"
- :
- :"r" (virt_addr),
- "r" (&value)
- :"$1","$2");
- restore_flags(flags);
+void i2c_vino_wdata(void *data, unsigned val)
+{
+ vino->i2c_data = val;
}
-static int vino_dma_setup(void)
+static struct i2c_algo_sgi_data i2c_sgi_vino_data =
{
- return 0;
+ .getctrl = &i2c_vino_getctrl,
+ .setctrl = &i2c_vino_setctrl,
+ .rdata = &i2c_vino_rdata,
+ .wdata = &i2c_vino_wdata,
+ .xfer_timeout = 200,
+ .ack_timeout = 1000,
+};
+
+/*
+ * There are two possible clients on VINO I2C bus, so we limit usage only
+ * to them.
+ */
+static int i2c_vino_client_reg(struct i2c_client *client)
+{
+ int res = 0;
+
+ down(&Vino->input_lock);
+ switch (client->driver->id) {
+ case I2C_DRIVERID_SAA7191:
+ if (Vino->decoder.driver)
+ res = -EBUSY;
+ else
+ Vino->decoder.driver = client;
+ break;
+ case I2C_DRIVERID_INDYCAM:
+ if (Vino->camera.driver)
+ res = -EBUSY;
+ else
+ Vino->camera.driver = client;
+ break;
+ default:
+ res = -ENODEV;
+ }
+ up(&Vino->input_lock);
+
+ return res;
}
-static void vino_dma_stop(void)
+static int i2c_vino_client_unreg(struct i2c_client *client)
{
+ int res = 0;
+
+ down(&Vino->input_lock);
+ if (client == Vino->decoder.driver) {
+ if (Vino->decoder.owner)
+ res = -EBUSY;
+ else
+ Vino->decoder.driver = NULL;
+ } else if (client == Vino->camera.driver) {
+ if (Vino->camera.owner)
+ res = -EBUSY;
+ else
+ Vino->camera.driver = NULL;
+ }
+ up(&Vino->input_lock);
+ return res;
}
-static int vino_init(void)
+static struct i2c_adapter vino_i2c_adapter =
{
- unsigned long ret;
- unsigned short rev, id;
- unsigned long long foo;
- unsigned long *bar;
-
- bar = (unsigned long *) &foo;
-
- ret = vino_reg_read(VINO_REVID);
-
- rev = (ret & VINO_REVID_REV_MASK);
- id = (ret & VINO_REVID_ID_MASK) >> 4;
-
- printk("Vino: ID:%02hx Rev:%02hx\n", id, rev);
-
- foo = vino_reg_read(VINO_A_DESC_DATA0);
- printk("0x%lx", bar[0]);
- printk("%lx ", bar[1]);
- foo = vino_reg_read(VINO_A_DESC_DATA1);
- printk("0x%lx", bar[0]);
- printk("%lx ", bar[1]);
- foo = vino_reg_read(VINO_A_DESC_DATA2);
- printk("0x%lx", bar[0]);
- printk("%lx ", bar[1]);
- foo = vino_reg_read(VINO_A_DESC_DATA3);
- printk("0x%lx", bar[0]);
- printk("%lx\n", bar[1]);
- foo = vino_reg_read(VINO_B_DESC_DATA0);
- printk("0x%lx", bar[0]);
- printk("%lx ", bar[1]);
- foo = vino_reg_read(VINO_B_DESC_DATA1);
- printk("0x%lx", bar[0]);
- printk("%lx ", bar[1]);
- foo = vino_reg_read(VINO_B_DESC_DATA2);
- printk("0x%lx", bar[0]);
- printk("%lx ", bar[1]);
- foo = vino_reg_read(VINO_B_DESC_DATA3);
- printk("0x%lx", bar[0]);
- printk("%lx\n", bar[1]);
+ .name = "VINO I2C bus",
+ .id = I2C_HW_SGI_VINO,
+ .algo_data = &i2c_sgi_vino_data,
+ .client_register = &i2c_vino_client_reg,
+ .client_unregister = &i2c_vino_client_unreg,
+};
- return 0;
+static int vino_i2c_add_bus(void)
+{
+ return i2c_sgi_add_bus(&vino_i2c_adapter);
}
-static void vino_dma_go(struct vino_device *v)
+static int vino_i2c_del_bus(void)
{
-
+ return i2c_sgi_del_bus(&vino_i2c_adapter);
}
-/* Reset the vino back to default state */
-static void vino_setup(struct vino_device *v)
+static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
-
}
static int vino_open(struct video_device *dev, int flags)
{
+ struct vino_device *videv = (struct vino_device *)dev;
+
return 0;
}
static void vino_close(struct video_device *dev)
{
+ struct vino_device *videv = (struct vino_device *)dev;
}
-static int vino_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
+static int vino_mmap(struct video_device *dev, const char *adr,
+ unsigned long size)
{
- return 0;
+ struct vino_device *videv = (struct vino_device *)dev;
+
+ return -EINVAL;
}
-static int vino_mmap(struct video_device *dev, const char *adr,
- unsigned long size)
+static int vino_ioctl(struct video_device *dev, unsigned int cmd, void *arg)
{
- return 0;
+ struct vino_device *videv = (struct vino_device *)dev;
+
+ return -EINVAL;
}
-static struct video_device vino_dev = {
+static const struct video_device vino_device = {
.owner = THIS_MODULE,
- .name = "Vino IndyCam/TV",
- .type = VID_TYPE_CAPTURE,
+ .type = VID_TYPE_CAPTURE | VID_TYPE_SUBCAPTURE,
.hardware = VID_HARDWARE_VINO,
+ .name = "VINO",
.open = vino_open,
.close = vino_close,
.ioctl = vino_ioctl,
.mmap = vino_mmap,
};
-int __init init_vino(struct video_device *dev)
+static int __init vino_init(void)
{
- int err;
+ unsigned long rev;
+ int i, ret = 0;
- err = vino_init();
- if (err)
- return err;
+ /* VINO is Indy specific beast */
+ if (ip22_is_fullhouse())
+ return -ENODEV;
-#if 0
- if (video_register_device(&vinodev, VFL_TYPE_GRABBER) == -1) {
+ /*
+ * VINO is in the EISA address space, so the sysid register will tell
+ * us if the EISA_PRESENT pin on MC has been pulled low.
+ *
+ * If EISA_PRESENT is not set we definitely don't have a VINO equiped
+ * system.
+ */
+ if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) {
+ printk(KERN_ERR "VINO not found\n");
return -ENODEV;
}
-#endif
- return 0;
-}
+ vino = (struct sgi_vino *)ioremap(VINO_BASE, sizeof(struct sgi_vino));
+ if (!vino)
+ return -EIO;
+
+ /* Okay, once we know that VINO is present we'll read its revision
+ * safe way. One never knows... */
+ if (get_dbe(rev, &(vino->rev_id))) {
+ printk(KERN_ERR "VINO: failed to read revision register\n");
+ ret = -ENODEV;
+ goto out_unmap;
+ }
+ if (VINO_ID_VALUE(rev) != VINO_CHIP_ID) {
+ printk(KERN_ERR "VINO is not VINO (Rev/ID: 0x%04lx)\n", rev);
+ ret = -ENODEV;
+ goto out_unmap;
+ }
+ printk(KERN_INFO "VINO Rev: 0x%02lx\n", VINO_REV_NUM(rev));
-#ifdef MODULE
-int init_module(void)
-{
- int err;
+ Vino = (struct vino_video *)
+ kmalloc(sizeof(struct vino_video), GFP_KERNEL);
+ if (!Vino) {
+ ret = -ENOMEM;
+ goto out_unmap;
+ }
+
+ Vino->dummy_page = get_zeroed_page(GFP_KERNEL | GFP_DMA);
+ if (!Vino->dummy_page) {
+ ret = -ENOMEM;
+ goto out_free_vino;
+ }
+ for (i = 0; i < 4; i++)
+ Vino->dummy_buf[i] = PHYSADDR(Vino->dummy_page);
+
+ vino->control = 0;
+ /* prevent VINO from throwing spurious interrupts */
+ vino->a.next_4_desc = PHYSADDR(Vino->dummy_buf);
+ vino->b.next_4_desc = PHYSADDR(Vino->dummy_buf);
+ udelay(5);
+ vino->intr_status = 0;
+ /* set threshold level */
+ vino->a.fifo_thres = threshold_a;
+ vino->b.fifo_thres = threshold_b;
+
+ init_MUTEX(&Vino->input_lock);
+
+ if (request_irq(SGI_VINO_IRQ, vino_interrupt, 0, vinostr, NULL)) {
+ printk(KERN_ERR "VINO: irq%02d registration failed\n",
+ SGI_VINO_IRQ);
+ ret = -EAGAIN;
+ goto out_free_page;
+ }
- err = vino_init();
- if (err)
- return err;
+ ret = vino_i2c_add_bus();
+ if (ret) {
+ printk(KERN_ERR "VINO: I2C bus registration failed\n");
+ goto out_free_irq;
+ }
+
+ if (video_register_device(&Vino->chA.vdev, VFL_TYPE_GRABBER, -1) < 0) {
+ printk("%s, chnl %d: device registration failed.\n",
+ Vino->chA.vdev.name, Vino->chA.chan);
+ ret = -EINVAL;
+ goto out_i2c_del_bus;
+ }
+ if (video_register_device(&Vino->chB.vdev, VFL_TYPE_GRABBER, -1) < 0) {
+ printk("%s, chnl %d: device registration failed.\n",
+ Vino->chB.vdev.name, Vino->chB.chan);
+ ret = -EINVAL;
+ goto out_unregister_vdev;
+ }
return 0;
+
+out_unregister_vdev:
+ video_unregister_device(&Vino->chA.vdev);
+out_i2c_del_bus:
+ vino_i2c_del_bus();
+out_free_irq:
+ free_irq(SGI_VINO_IRQ, NULL);
+out_free_page:
+ free_page(Vino->dummy_page);
+out_free_vino:
+ kfree(Vino);
+out_unmap:
+ iounmap(vino);
+
+ return ret;
}
-void cleanup_module(void)
+static void __exit vino_exit(void)
{
+ video_unregister_device(&Vino->chA.vdev);
+ video_unregister_device(&Vino->chB.vdev);
+ vino_i2c_del_bus();
+ free_irq(SGI_VINO_IRQ, NULL);
+ free_page(Vino->dummy_page);
+ kfree(Vino);
+ iounmap(vino);
}
-#endif
+
+module_init(vino_init);
+module_exit(vino_exit);
+
+MODULE_DESCRIPTION("Video4Linux driver for SGI Indy VINO (IndyCam)");
+MODULE_LICENSE("GPL");
diff -puN drivers/media/video/vino.h~mips-sgi-ip22-updates drivers/media/video/vino.h
--- 25/drivers/media/video/vino.h~mips-sgi-ip22-updates 2005-01-29 11:25:53.134791592 -0800
+++ 25-akpm/drivers/media/video/vino.h 2005-01-29 11:25:53.165786880 -0800
@@ -1,64 +1,84 @@
/*
- * Copyright (C) 1999 Ulf Carlsson (ulfc@bun.falkenberg.se)
- * Copyright (C) 2001 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999 Ulf Karlsson <ulfc@bun.falkenberg.se>
+ * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
*/
-#define VINO_BASE 0x00080000 /* In EISA address space */
+#ifndef VINO_H
+#define VINO_H
-#define VINO_REVID 0x0000
-#define VINO_CTRL 0x0008
-#define VINO_INTSTAT 0x0010 /* Interrupt status */
-#define VINO_I2C_CTRL 0x0018
-#define VINO_I2C_DATA 0x0020
-#define VINO_A_ALPHA 0x0028 /* Channel A ... */
-#define VINO_A_CLIPS 0x0030 /* Clipping start */
-#define VINO_A_CLIPE 0x0038 /* Clipping end */
-#define VINO_A_FRAMERT 0x0040 /* Framerate */
-#define VINO_A_FLDCNT 0x0048 /* Field counter */
-#define VINO_A_LNSZ 0x0050
-#define VINO_A_LNCNT 0x0058
-#define VINO_A_PGIX 0x0060 /* Page index */
-#define VINO_A_DESC_PTR 0x0068 /* Ptr to next four descriptors */
-#define VINO_A_DESC_TLB_PTR 0x0070 /* Ptr to start of descriptor table */
-#define VINO_A_DESC_DATA0 0x0078 /* Descriptor data 0 */
-#define VINO_A_DESC_DATA1 0x0080 /* ... */
-#define VINO_A_DESC_DATA2 0x0088
-#define VINO_A_DESC_DATA3 0x0090
-#define VINO_A_FIFO_THRESHOLD 0x0098 /* FIFO threshold */
-#define VINO_A_FIFO_RP 0x00a0
-#define VINO_A_FIFO_WP 0x00a8
-#define VINO_B_ALPHA 0x00b0 /* Channel B ... */
-#define VINO_B_CLIPS 0x00b8
-#define VINO_B_CLIPE 0x00c0
-#define VINO_B_FRAMERT 0x00c8
-#define VINO_B_FLDCNT 0x00d0
-#define VINO_B_LNSZ 0x00d8
-#define VINO_B_LNCNT 0x00e0
-#define VINO_B_PGIX 0x00e8
-#define VINO_B_DESC_PTR 0x00f0
-#define VINO_B_DESC_TLB_PTR 0x00f8
-#define VINO_B_DESC_DATA0 0x0100
-#define VINO_B_DESC_DATA1 0x0108
-#define VINO_B_DESC_DATA2 0x0110
-#define VINO_B_DESC_DATA3 0x0118
-#define VINO_B_FIFO_THRESHOLD 0x0120
-#define VINO_B_FIFO_RP 0x0128
-#define VINO_B_FIFO_WP 0x0130
+#define VINO_BASE 0x00080000 /* Vino is in the EISA address space,
+ * but it is not an EISA bus card */
-/* Bits in the VINO_REVID register */
-
-#define VINO_REVID_REV_MASK 0x000f /* bits 0:3 */
-#define VINO_REVID_ID_MASK 0x00f0 /* bits 4:7 */
-
-/* Bits in the VINO_CTRL register */
+struct sgi_vino_channel {
+ u32 _pad_alpha;
+ volatile u32 alpha;
+
+#define VINO_CLIP_X(x) ((x) & 0x3ff) /* bits 0:9 */
+#define VINO_CLIP_ODD(x) (((x) & 0x1ff) << 10) /* bits 10:18 */
+#define VINO_CLIP_EVEN(x) (((x) & 0x1ff) << 19) /* bits 19:27 */
+ u32 _pad_clip_start;
+ volatile u32 clip_start;
+ u32 _pad_clip_end;
+ volatile u32 clip_end;
+
+#define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */
+#define VINO_FRAMERT_RT(x) (((x) & 0x1fff) << 1) /* bits 1:12 */
+ u32 _pad_frame_rate;
+ volatile u32 frame_rate;
+
+ u32 _pad_field_counter;
+ volatile u32 field_counter;
+ u32 _pad_line_size;
+ volatile u32 line_size;
+ u32 _pad_line_count;
+ volatile u32 line_count;
+ u32 _pad_page_index;
+ volatile u32 page_index;
+ u32 _pad_next_4_desc;
+ volatile u32 next_4_desc;
+ u32 _pad_start_desc_tbl;
+ volatile u32 start_desc_tbl;
+
+#define VINO_DESC_JUMP (1<<30)
+#define VINO_DESC_STOP (1<<31)
+#define VINO_DESC_VALID (1<<32)
+ u32 _pad_desc_0;
+ volatile u32 desc_0;
+ u32 _pad_desc_1;
+ volatile u32 desc_1;
+ u32 _pad_desc_2;
+ volatile u32 desc_2;
+ u32 _pad_Bdesc_3;
+ volatile u32 desc_3;
+
+ u32 _pad_fifo_thres;
+ volatile u32 fifo_thres;
+ u32 _pad_fifo_read;
+ volatile u32 fifo_read;
+ u32 _pad_fifo_write;
+ volatile u32 fifo_write;
+};
+
+struct sgi_vino {
+#define VINO_CHIP_ID 0xb
+#define VINO_REV_NUM(x) ((x) & 0x0f)
+#define VINO_ID_VALUE(x) (((x) & 0xf0) >> 4)
+ u32 _pad_rev_id;
+ volatile u32 rev_id;
#define VINO_CTRL_LITTLE_ENDIAN (1<<0)
#define VINO_CTRL_A_FIELD_TRANS_INT (1<<1) /* Field transferred int */
#define VINO_CTRL_A_FIFO_OF_INT (1<<2) /* FIFO overflow int */
#define VINO_CTRL_A_END_DESC_TBL_INT (1<<3) /* End of desc table int */
+#define VINO_CTRL_A_INT (VINO_CTRL_A_FIELD_TRANS_INT | \
+ VINO_CTRL_A_FIFO_OF_INT | \
+ VINO_CTRL_A_END_DESC_TBL_INT)
#define VINO_CTRL_B_FIELD_TRANS_INT (1<<4) /* Field transferred int */
#define VINO_CTRL_B_FIFO_OF_INT (1<<5) /* FIFO overflow int */
-#define VINO_CTRL_B_END_DESC_TLB_INT (1<<6) /* End of desc table int */
+#define VINO_CTRL_B_END_DESC_TBL_INT (1<<6) /* End of desc table int */
+#define VINO_CTRL_B_INT (VINO_CTRL_B_FIELD_TRANS_INT | \
+ VINO_CTRL_B_FIFO_OF_INT | \
+ VINO_CTRL_B_END_DESC_TBL_INT)
#define VINO_CTRL_A_DMA_ENBL (1<<7)
#define VINO_CTRL_A_INTERLEAVE_ENBL (1<<8)
#define VINO_CTRL_A_SYNC_ENBL (1<<9)
@@ -67,51 +87,45 @@
#define VINO_CTRL_A_LUMA_ONLY (1<<12)
#define VINO_CTRL_A_DEC_ENBL (1<<13) /* Decimation */
#define VINO_CTRL_A_DEC_SCALE_MASK 0x1c000 /* bits 14:17 */
+#define VINO_CTRL_A_DEC_SCALE_SHIFT (14)
#define VINO_CTRL_A_DEC_HOR_ONLY (1<<17) /* Horizontal only */
#define VINO_CTRL_A_DITHER (1<<18) /* 24 -> 8 bit dither */
#define VINO_CTRL_B_DMA_ENBL (1<<19)
#define VINO_CTRL_B_INTERLEAVE_ENBL (1<<20)
#define VINO_CTRL_B_SYNC_ENBL (1<<21)
#define VINO_CTRL_B_SELECT (1<<22) /* 1=D1 0=Philips */
-#define VINO_CTRL_B_RGB (1<<22) /* 1=RGB 0=YUV */
-#define VINO_CTRL_B_LUMA_ONLY (1<<23)
-#define VINO_CTRL_B_DEC_ENBL (1<<24) /* Decimation */
-#define VINO_CTRL_B_DEC_SCALE_MASK 0x1c000000 /* bits 25:28 */
+#define VINO_CTRL_B_RGB (1<<23) /* 1=RGB 0=YUV */
+#define VINO_CTRL_B_LUMA_ONLY (1<<24)
+#define VINO_CTRL_B_DEC_ENBL (1<<25) /* Decimation */
+#define VINO_CTRL_B_DEC_SCALE_MASK 0x1c000000 /* bits 26:28 */
+#define VINO_CTRL_B_DEC_SCALE_SHIFT (26)
#define VINO_CTRL_B_DEC_HOR_ONLY (1<<29) /* Decimation horizontal only */
#define VINO_CTRL_B_DITHER (1<<30) /* ChanB 24 -> 8 bit dither */
-
-/* Bits in the Interrupt and Status register */
+ u32 _pad_control;
+ volatile u32 control;
#define VINO_INTSTAT_A_FIELD_TRANS (1<<0) /* Field transferred int */
#define VINO_INTSTAT_A_FIFO_OF (1<<1) /* FIFO overflow int */
#define VINO_INTSTAT_A_END_DESC_TBL (1<<2) /* End of desc table int */
+#define VINO_INTSTAT_A (VINO_INTSTAT_A_FIELD_TRANS | \
+ VINO_INTSTAT_A_FIFO_OF | \
+ VINO_INTSTAT_A_END_DESC_TBL)
#define VINO_INTSTAT_B_FIELD_TRANS (1<<3) /* Field transferred int */
#define VINO_INTSTAT_B_FIFO_OF (1<<4) /* FIFO overflow int */
#define VINO_INTSTAT_B_END_DESC_TBL (1<<5) /* End of desc table int */
+#define VINO_INTSTAT_B (VINO_INTSTAT_B_FIELD_TRANS | \
+ VINO_INTSTAT_B_FIFO_OF | \
+ VINO_INTSTAT_B_END_DESC_TBL)
+ u32 _pad_intr_status;
+ volatile u32 intr_status;
+
+ u32 _pad_i2c_control;
+ volatile u32 i2c_control;
+ u32 _pad_i2c_data;
+ volatile u32 i2c_data;
+
+ struct sgi_vino_channel a;
+ struct sgi_vino_channel b;
+};
-/* Bits in the Clipping Start register */
-
-#define VINO_CLIPS_START 0x3ff /* bits 0:9 */
-#define VINO_CLIPS_ODD_MASK 0x7fc00 /* bits 10:18 */
-#define VINO_CLIPS_EVEN_MASK 0xff80000 /* bits 19:27 */
-
-/* Bits in the Clipping End register */
-
-#define VINO_CLIPE_END 0x3ff /* bits 0:9 */
-#define VINO_CLIPE_ODD_MASK 0x7fc00 /* bits 10:18 */
-#define VINO_CLIPE_EVEN_MASK 0xff80000 /* bits 19:27 */
-
-/* Bits in the Frame Rate register */
-
-#define VINO_FRAMERT_PAL (1<<0) /* 0=NTSC 1=PAL */
-#define VINO_FRAMERT_RT_MASK 0x1ffe /* bits 1:12 */
-
-/* Bits in the VINO_I2C_CTRL */
-
-#define VINO_CTRL_I2C_IDLE (1<<0) /* write: 0=force idle
- * read: 0=idle 1=not idle */
-#define VINO_CTRL_I2C_DIR (1<<1) /* 0=read 1=write */
-#define VINO_CTRL_I2C_MORE_BYTES (1<<2) /* 0=last byte 1=more bytes */
-#define VINO_CTRL_I2C_TRANS_BUSY (1<<4) /* 0=trans done 1=trans busy */
-#define VINO_CTRL_I2C_ACK (1<<5) /* 0=ack received 1=ack not */
-#define VINO_CTRL_I2C_BUS_ERROR (1<<7) /* 0=no bus err 1=bus err */
+#endif
diff -puN drivers/scsi/wd33c93.h~mips-sgi-ip22-updates drivers/scsi/wd33c93.h
--- 25/drivers/scsi/wd33c93.h~mips-sgi-ip22-updates 2005-01-29 11:25:53.135791440 -0800
+++ 25-akpm/drivers/scsi/wd33c93.h 2005-01-29 11:25:53.160787640 -0800
@@ -22,6 +22,8 @@
#ifndef WD33C93_H
#define WD33C93_H
+#include <linux/config.h>
+
#define PROC_INTERFACE /* add code for /proc/scsi/wd33c93/xxx interface */
#ifdef PROC_INTERFACE
#define PROC_STATISTICS /* add code for keeping various real time stats */
diff -puN drivers/serial/ip22zilog.c~mips-sgi-ip22-updates drivers/serial/ip22zilog.c
--- 25/drivers/serial/ip22zilog.c~mips-sgi-ip22-updates 2005-01-29 11:25:53.137791136 -0800
+++ 25-akpm/drivers/serial/ip22zilog.c 2005-01-29 11:25:53.160787640 -0800
@@ -47,8 +47,6 @@
#include "ip22zilog.h"
-int ip22serial_current_minor = 64;
-
void ip22_do_break(void);
/*
@@ -59,10 +57,10 @@ void ip22_do_break(void);
#define ZSDELAY_LONG() udelay(20)
#define ZS_WSYNC(channel) do { } while (0)
-#define NUM_IP22ZILOG 1
-#define NUM_CHANNELS (NUM_IP22ZILOG * 2)
+#define NUM_IP22ZILOG 1
+#define NUM_CHANNELS (NUM_IP22ZILOG * 2)
-#define ZS_CLOCK 4915200 /* Zilog input clock rate. */
+#define ZS_CLOCK 3672000 /* Zilog input clock rate. */
#define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */
/*
@@ -86,7 +84,7 @@ struct uart_ip22zilog_port {
#define IP22ZILOG_FLAG_TX_STOPPED 0x00000080
#define IP22ZILOG_FLAG_TX_ACTIVE 0x00000100
- unsigned int cflag;
+ unsigned int cflag;
/* L1-A keyboard break state. */
int kbd_id;
@@ -642,36 +640,28 @@ static void ip22zilog_start_tx(struct ua
}
}
-/* The port lock is not held. */
+/* The port lock is held and interrupts are disabled. */
static void ip22zilog_stop_rx(struct uart_port *port)
{
struct uart_ip22zilog_port *up = UART_ZILOG(port);
struct zilog_channel *channel;
- unsigned long flags;
if (ZS_IS_CONS(up))
return;
- spin_lock_irqsave(&port->lock, flags);
-
channel = ZILOG_CHANNEL_FROM_PORT(port);
/* Disable all RX interrupts. */
up->curregs[R1] &= ~RxINT_MASK;
ip22zilog_maybe_update_regs(up, channel);
-
- spin_unlock_irqrestore(&port->lock, flags);
}
-/* The port lock is not held. */
+/* The port lock is held. */
static void ip22zilog_enable_ms(struct uart_port *port)
{
struct uart_ip22zilog_port *up = (struct uart_ip22zilog_port *) port;
struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
unsigned char new_reg;
- unsigned long flags;
-
- spin_lock_irqsave(&port->lock, flags);
new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
if (new_reg != up->curregs[R15]) {
@@ -680,8 +670,6 @@ static void ip22zilog_enable_ms(struct u
/* NOTE: Not subject to 'transmitter active' rule. */
write_zsreg(channel, R15, up->curregs[R15]);
}
-
- spin_unlock_irqrestore(&port->lock, flags);
}
/* The port lock is not held. */
@@ -807,7 +795,7 @@ ip22zilog_convert_to_zs(struct uart_ip22
up->curregs[R4] |= X16CLK;
up->curregs[R12] = brg & 0xff;
up->curregs[R13] = (brg >> 8) & 0xff;
- up->curregs[R14] = BRSRC | BRENAB;
+ up->curregs[R14] = BRENAB;
/* Character size, stop bits, and parity. */
up->curregs[3] &= ~RxN_MASK;
@@ -950,13 +938,6 @@ static struct zilog_layout **ip22zilog_c
static struct uart_ip22zilog_port *ip22zilog_irq_chain;
static int zilog_irq = -1;
-static struct uart_driver ip22zilog_reg = {
- .owner = THIS_MODULE,
- .driver_name = "ttyS",
- .devfs_name = "tty/",
- .major = TTY_MAJOR,
-};
-
static void * __init alloc_one_table(unsigned long size)
{
void *ret;
@@ -990,7 +971,7 @@ static struct zilog_layout * __init get_
}
/* Not probe-able, hard code it. */
- base = (unsigned long) &sgioc->serport;
+ base = (unsigned long) &sgioc->uart;
zilog_irq = SGI_SERIAL_IRQ;
request_mem_region(base, 8, "IP22-Zilog");
@@ -1047,9 +1028,6 @@ ip22serial_console_termios(struct consol
int parity = 'n';
int flow = 'n';
- if (!serial_console)
- return;
-
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
@@ -1077,8 +1055,7 @@ static int __init ip22zilog_console_setu
unsigned long flags;
int baud, brg;
- printk("Console: ttyS%d (IP22-Zilog)\n",
- (ip22zilog_reg.minor - 64) + con->index);
+ printk("Console: ttyS%d (IP22-Zilog)\n", con->index);
/* Get firmware console settings. */
ip22serial_console_termios(con, options);
@@ -1112,6 +1089,8 @@ static int __init ip22zilog_console_setu
return 0;
}
+static struct uart_driver ip22zilog_reg;
+
static struct console ip22zilog_console = {
.name = "ttyS",
.write = ip22zilog_console_write,
@@ -1121,32 +1100,20 @@ static struct console ip22zilog_console
.index = -1,
.data = &ip22zilog_reg,
};
-#define IP22ZILOG_CONSOLE (&ip22zilog_console)
-
-static int __init ip22zilog_console_init(void)
-{
- int i;
-
- if (con_is_present())
- return 0;
-
- for (i = 0; i < NUM_CHANNELS; i++) {
- int this_minor = ip22zilog_reg.minor + i;
+#endif /* CONFIG_SERIAL_IP22_ZILOG_CONSOLE */
- if ((this_minor - 64) == (serial_console - 1))
- break;
- }
- if (i == NUM_CHANNELS)
- return 0;
-
- ip22zilog_console.index = i;
- register_console(&ip22zilog_console);
- return 0;
-}
-#else /* CONFIG_SERIAL_IP22_ZILOG_CONSOLE */
-#define IP22ZILOG_CONSOLE (NULL)
-#define ip22zilog_console_init() do { } while (0)
+static struct uart_driver ip22zilog_reg = {
+ .owner = THIS_MODULE,
+ .driver_name = "serial",
+ .devfs_name = "tts/",
+ .dev_name = "ttyS",
+ .major = TTY_MAJOR,
+ .minor = 64,
+ .nr = NUM_CHANNELS,
+#ifdef CONFIG_SERIAL_IP22_ZILOG_CONSOLE
+ .cons = &ip22zilog_console,
#endif
+};
static void __init ip22zilog_prepare(void)
{
@@ -1160,17 +1127,24 @@ static void __init ip22zilog_prepare(voi
for (channel = 0; channel < NUM_CHANNELS; channel++)
spin_lock_init(&ip22zilog_port_table[channel].port.lock);
- ip22zilog_irq_chain = up = &ip22zilog_port_table[0];
- for (channel = 0; channel < NUM_CHANNELS - 1; channel++)
- up[channel].next = &up[channel + 1];
+ ip22zilog_irq_chain = &ip22zilog_port_table[NUM_CHANNELS - 1];
+ up = &ip22zilog_port_table[0];
+ for (channel = NUM_CHANNELS - 1 ; channel > 0; channel--)
+ up[channel].next = &up[channel - 1];
up[channel].next = NULL;
for (chip = 0; chip < NUM_IP22ZILOG; chip++) {
if (!ip22zilog_chip_regs[chip]) {
ip22zilog_chip_regs[chip] = rp = get_zs(chip);
- up[(chip * 2) + 0].port.membase = (char *) &rp->channelA;
- up[(chip * 2) + 1].port.membase = (char *) &rp->channelB;
+ up[(chip * 2) + 0].port.membase = (char *) &rp->channelB;
+ up[(chip * 2) + 1].port.membase = (char *) &rp->channelA;
+
+ /* In theory mapbase is the physical address ... */
+ up[(chip * 2) + 0].port.mapbase =
+ (unsigned long) ioremap((unsigned long) &rp->channelB, 8);
+ up[(chip * 2) + 1].port.mapbase =
+ (unsigned long) ioremap((unsigned long) &rp->channelA, 8);
}
/* Channel A */
@@ -1182,7 +1156,7 @@ static void __init ip22zilog_prepare(voi
up[(chip * 2) + 0].port.type = PORT_IP22ZILOG;
up[(chip * 2) + 0].port.flags = 0;
up[(chip * 2) + 0].port.line = (chip * 2) + 0;
- up[(chip * 2) + 0].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;
+ up[(chip * 2) + 0].flags = 0;
/* Channel B */
up[(chip * 2) + 1].port.iotype = UPIO_MEM;
@@ -1191,9 +1165,9 @@ static void __init ip22zilog_prepare(voi
up[(chip * 2) + 1].port.fifosize = 1;
up[(chip * 2) + 1].port.ops = &ip22zilog_pops;
up[(chip * 2) + 1].port.type = PORT_IP22ZILOG;
- up[(chip * 2) + 1].port.flags = 0;
+ up[(chip * 2) + 1].port.flags |= IP22ZILOG_FLAG_IS_CHANNEL_A;
up[(chip * 2) + 1].port.line = (chip * 2) + 1;
- up[(chip * 2) + 1].flags |= 0;
+ up[(chip * 2) + 1].flags = 0;
}
}
@@ -1228,8 +1202,10 @@ static void __init ip22zilog_init_hw(voi
brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
up->curregs[R12] = (brg & 0xff);
up->curregs[R13] = (brg >> 8) & 0xff;
- up->curregs[R14] = BRSRC | BRENAB;
+ up->curregs[R14] = BRENAB;
__load_zsregs(channel, up->curregs);
+ /* set master interrupt enable */
+ write_zsreg(channel, R9, up->curregs[R9]);
spin_unlock_irqrestore(&up->port.lock, flags);
}
@@ -1250,15 +1226,6 @@ static int __init ip22zilog_ports_init(v
ip22zilog_init_hw();
- /* We can only init this once we have probed the Zilogs
- * in the system.
- */
- ip22zilog_reg.nr = NUM_CHANNELS;
- ip22zilog_reg.cons = IP22ZILOG_CONSOLE;
-
- ip22zilog_reg.minor = ip22serial_current_minor;
- ip22serial_current_minor += NUM_CHANNELS;
-
ret = uart_register_driver(&ip22zilog_reg);
if (ret == 0) {
int i;
@@ -1276,11 +1243,8 @@ static int __init ip22zilog_ports_init(v
static int __init ip22zilog_init(void)
{
/* IP22 Zilog setup is hard coded, no probing to do. */
-
ip22zilog_alloc_tables();
-
ip22zilog_ports_init();
- ip22zilog_console_init();
return 0;
}
diff -puN drivers/video/console/newport_con.c~mips-sgi-ip22-updates drivers/video/console/newport_con.c
--- 25/drivers/video/console/newport_con.c~mips-sgi-ip22-updates 2005-01-29 11:25:53.138790984 -0800
+++ 25-akpm/drivers/video/console/newport_con.c 2005-01-29 11:25:53.157788096 -0800
@@ -21,6 +21,7 @@
#include <linux/module.h>
#include <linux/slab.h>
+#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/page.h>
@@ -73,7 +74,7 @@ static int newport_set_def_font(int unit
static inline void newport_render_background(int xstart, int ystart,
int xend, int yend, int ci)
{
- newport_wait();
+ newport_wait(npregs);
npregs->set.wrmask = 0xffffffff;
npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
@@ -90,7 +91,7 @@ static inline void newport_init_cmap(voi
unsigned short i;
for (i = 0; i < 16; i++) {
- newport_bfwait();
+ newport_bfwait(npregs);
newport_cmap_setaddr(npregs, color_table[i]);
newport_cmap_setrgb(npregs,
default_red[i],
@@ -107,19 +108,19 @@ static void newport_show_logo(void)
unsigned long i;
for (i = 0; i < logo->clutsize; i++) {
- newport_bfwait();
+ newport_bfwait(npregs);
newport_cmap_setaddr(npregs, i + 0x20);
newport_cmap_setrgb(npregs, clut[0], clut[1], clut[2]);
clut += 3;
}
- newport_wait();
+ newport_wait(npregs);
npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
NPORT_DMODE0_CHOST);
npregs->set.xystarti = ((newport_xsize - logo->width) << 16) | (0);
npregs->set.xyendi = ((newport_xsize - 1) << 16);
- newport_wait();
+ newport_wait(npregs);
for (i = 0; i < logo->width*logo->height; i++)
npregs->go.hostrw0 = *data++ << 24;
@@ -132,7 +133,7 @@ static inline void newport_clear_screen(
if (logo_active)
return;
- newport_wait();
+ newport_wait(npregs);
npregs->set.wrmask = 0xffffffff;
npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
@@ -154,7 +155,7 @@ void newport_reset(void)
unsigned short treg;
int i;
- newport_wait();
+ newport_wait(npregs);
treg = newport_vc2_get(npregs, VC2_IREG_CONTROL);
newport_vc2_set(npregs, VC2_IREG_CONTROL,
(treg | VC2_CTRL_EVIDEO));
@@ -164,7 +165,7 @@ void newport_reset(void)
npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
NPORT_DMODE_W2 | VC2_PROTOCOL);
for (i = 0; i < 128; i++) {
- newport_bfwait();
+ newport_bfwait(npregs);
if (i == 92 || i == 94)
npregs->set.dcbdata0.byshort.s1 = 0xff00;
else
@@ -204,7 +205,7 @@ void newport_get_screensize(void)
npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
NPORT_DMODE_W2 | VC2_PROTOCOL);
for (i = 0; i < 128; i++) {
- newport_bfwait();
+ newport_bfwait(npregs);
linetable[i] = npregs->set.dcbdata0.byshort.s1;
}
@@ -215,12 +216,12 @@ void newport_get_screensize(void)
npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
NPORT_DMODE_W2 | VC2_PROTOCOL);
do {
- newport_bfwait();
+ newport_bfwait(npregs);
treg = npregs->set.dcbdata0.byshort.s1;
if ((treg & 1) == 0)
cols += (treg >> 7) & 0xfe;
if ((treg & 0x80) == 0) {
- newport_bfwait();
+ newport_bfwait(npregs);
treg = npregs->set.dcbdata0.byshort.s1;
}
} while ((treg & 0x8000) == 0);
@@ -290,16 +291,16 @@ static const char *newport_startup(void)
if (!sgi_gfxaddr)
return NULL;
- npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
+ npregs = (struct newport_regs *) /* ioremap cannot fail */
+ ioremap(sgi_gfxaddr, sizeof(struct newport_regs));
npregs->cset.config = NPORT_CFG_GD0;
- if (newport_wait()) {
- return NULL;
- }
+ if (newport_wait(npregs))
+ goto out_unmap;
npregs->set.xstarti = TESTVAL;
if (npregs->set._xstart.word != XSTI_TO_FXSTART(TESTVAL))
- return NULL;
+ goto out_unmap;
for (i = 0; i < MAX_NR_CONSOLES; i++)
font_data[i] = FONT_DATA;
@@ -309,6 +310,10 @@ static const char *newport_startup(void)
newport_get_screensize();
return "SGI Newport";
+
+out_unmap:
+ iounmap((void *)npregs);
+ return NULL;
}
static void newport_init(struct vc_data *vc, int init)
@@ -362,7 +367,7 @@ static void newport_putc(struct vc_data
(charattr & 0xf0) >> 4);
/* Set the color and drawing mode. */
- newport_wait();
+ newport_wait(npregs);
npregs->set.colori = charattr & 0xf;
npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
NPORT_DMODE0_STOPX | NPORT_DMODE0_ZPENAB |
@@ -371,7 +376,7 @@ static void newport_putc(struct vc_data
/* Set coordinates for bitmap operation. */
npregs->set.xystarti = (xpos << 16) | ((ypos + topscan) & 0x3ff);
npregs->set.xyendi = ((xpos + 7) << 16);
- newport_wait();
+ newport_wait(npregs);
/* Go, baby, go... */
RENDER(npregs, p);
@@ -395,7 +400,7 @@ static void newport_putcs(struct vc_data
xpos + ((count - 1) << 3), ypos,
(charattr & 0xf0) >> 4);
- newport_wait();
+ newport_wait(npregs);
/* Set the color and drawing mode. */
npregs->set.colori = charattr & 0xf;
@@ -406,7 +411,7 @@ static void newport_putcs(struct vc_data
for (i = 0; i < count; i++, xpos += 8) {
p = &font_data[vc->vc_num][(scr_readw(s++) & 0xff) << 4];
- newport_wait();
+ newport_wait(npregs);
/* Set coordinates for bitmap operation. */
npregs->set.xystarti =
@@ -459,7 +464,7 @@ static int newport_switch(struct vc_data
return 1;
}
-static int newport_blank(struct vc_data *c, int blank)
+static int newport_blank(struct vc_data *c, int blank, int mode_switch)
{
unsigned short treg;
@@ -684,7 +689,7 @@ static void newport_bmove(struct vc_data
xe = xs;
xs = tmp;
}
- newport_wait();
+ newport_wait(npregs);
npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
| NPORT_DMODE0_STOPY);
@@ -701,24 +706,24 @@ static int newport_dummy(struct vc_data
#define DUMMY (void *) newport_dummy
const struct consw newport_con = {
- .owner = THIS_MODULE,
- .con_startup = newport_startup,
- .con_init = newport_init,
- .con_deinit = newport_deinit,
- .con_clear = newport_clear,
- .con_putc = newport_putc,
- .con_putcs = newport_putcs,
- .con_cursor = newport_cursor,
- .con_scroll = newport_scroll,
- .con_bmove = newport_bmove,
- .con_switch = newport_switch,
- .con_blank = newport_blank,
- .con_font_set = newport_font_set,
- .con_font_default = newport_font_default,
- .con_set_palette = newport_set_palette,
- .con_scrolldelta = newport_scrolldelta,
- .con_set_origin = DUMMY,
- .con_save_screen = DUMMY
+ .owner = THIS_MODULE,
+ .con_startup = newport_startup,
+ .con_init = newport_init,
+ .con_deinit = newport_deinit,
+ .con_clear = newport_clear,
+ .con_putc = newport_putc,
+ .con_putcs = newport_putcs,
+ .con_cursor = newport_cursor,
+ .con_scroll = newport_scroll,
+ .con_bmove = newport_bmove,
+ .con_switch = newport_switch,
+ .con_blank = newport_blank,
+ .con_font_set = newport_font_set,
+ .con_font_default = newport_font_default,
+ .con_set_palette = newport_set_palette,
+ .con_scrolldelta = newport_scrolldelta,
+ .con_set_origin = DUMMY,
+ .con_save_screen = DUMMY
};
#ifdef MODULE
@@ -730,6 +735,7 @@ static int __init newport_console_init(v
static void __exit newport_console_exit(void)
{
give_up_console(&newport_con);
+ iounmap((void *)npregs);
}
module_init(newport_console_init);
diff -L include/asm-mips/ng1.h -puN include/asm-mips/ng1.h~mips-sgi-ip22-updates /dev/null
--- 25/include/asm-mips/ng1.h
+++ /dev/null 2003-09-15 06:40:47.000000000 -0700
@@ -1,55 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI/Newport video card ioctl definitions
- */
-#ifndef _ASM_NG1_H
-#define _ASM_NG1_H
-
-typedef struct {
- int flags;
- __u16 w, h;
- __u16 fields_sec;
-} ng1_vof_info_t;
-
-struct ng1_info {
- struct gfx_info gfx_info;
- __u8 boardrev;
- __u8 rex3rev;
- __u8 vc2rev;
- __u8 monitortype;
- __u8 videoinstalled;
- __u8 mcrev;
- __u8 bitplanes;
- __u8 xmap9rev;
- __u8 cmaprev;
- ng1_vof_info_t ng1_vof_info;
- __u8 bt445rev;
- __u8 paneltype;
-};
-
-#define GFX_NAME_NEWPORT "NG1"
-
-/* ioctls */
-#define NG1_SET_CURSOR_HOTSPOT 21001
-struct ng1_set_cursor_hotspot {
- unsigned short xhot;
- unsigned short yhot;
-};
-
-#define NG1_SETDISPLAYMODE 21006
-struct ng1_setdisplaymode_args {
- int wid;
- unsigned int mode;
-};
-
-#define NG1_SETGAMMARAMP0 21007
-struct ng1_setgammaramp_args {
- unsigned char red [256];
- unsigned char green [256];
- unsigned char blue [256];
-};
-
-#endif /* _ASM_NG1_H */
diff -L include/asm-mips/ng1hw.h -puN include/asm-mips/ng1hw.h~mips-sgi-ip22-updates /dev/null
--- 25/include/asm-mips/ng1hw.h
+++ /dev/null 2003-09-15 06:40:47.000000000 -0700
@@ -1,219 +0,0 @@
-/*
- * ng1hw.h: Tweaks the newport.h structures and definitions to be compatible
- * with IRIX. Quite ugly, but it works.
- *
- * Copyright (C) 1999 Ulf Carlsson (ulfc@thepuffingroup.com)
- */
-#ifndef _SGI_NG1HW_H
-#define _SGI_NG1HW_H
-
-#include <video/newport.h>
-
-#define rex3regs newport_rexregs
-#define configregs newport_cregs
-#define float_long npfreg_t
-
-typedef struct newport_rexregs Rex3regs;
-typedef struct newport_cregs Configregs;
-typedef union np_dcb DCB_reg;
-
-
-/* It looks like I can't do a simple tweak with this structure because the IRIX
- * version is just *too* stupid. Ok, here's a new version of it..
- */
-
-struct rex3chip {
- struct newport_rexregs set;
- unsigned long _unused0[0x16e];
- struct newport_rexregs go;
- unsigned long _unused1[0x22e];
- struct {
- struct newport_cregs set;
- unsigned long _unused2[0x1ef];
- struct newport_cregs go;
- } p1;
-};
-
-typedef struct rex3chip rex3Chip;
-typedef struct rex3chip Rex3chip;
-
-/* Tweak the defines .. */
-
-#define DM0_OPCODE NPORT_DMODE0_OPMASK
-#define DM0_NOP NPORT_DMODE0_NOP
-#define DM0_READ NPORT_DMODE0_RD
-#define DM0_DRAW NPORT_DMODE0_DRAW
-#define DM0_SCR2SCR NPORT_DMODE0_S2S
-
-#define DM0_ADRMODE_SHIFT 2
-#define DM0_ADRMODE NPORT_DMODE0_AMMASK
-#define DM0_SPAN NPORT_DMODE0_SPAN
-#define DM0_BLOCK NPORT_DMODE0_BLOCK
-#define DM0_ILINE NPORT_DMODE0_ILINE
-#define DM0_FLINE NPORT_DMODE0_FLINE
-#define DM0_ALINE NPORT_DMODE0_ALINE
-#define DM0_TLINE NPORT_DMODE0_TLINE
-#define DM0_BLINE NPORT_DMODE0_BLINE
-
-#define DM0_DOSETUP NPORT_DMODE0_DOSETUP
-#define DM0_COLORHOST NPORT_DMODE0_CHOST
-#define DM0_ALPHAHOST NPORT_DMODE0_AHOST
-#define DM0_STOPONX NPORT_DMODE0_STOPX
-#define DM0_STOPONY NPORT_DMODE0_STOPY
-#define DM0_STOPONXY (NPORT_DMODE0_STOPX | NPORT_DMODE0_STOPY)
-#define DM0_SKIPFIRST NPORT_DMODE0_SK1ST
-#define DM0_SKIPLAST NPORT_DMODE0_SKLST
-#define DM0_ENZPATTERN NPORT_DMODE0_ZPENAB
-#define DM0_ENLSPATTERN NPORT_DMODE0_LISPENAB
-#define DM0_LSADVLAST NPORT_DMODE0_LISLST
-#define DM0_LENGTH32 NPORT_DMODE0_L32
-#define DM0_ZOPAQUE NPORT_DMODE0_ZOPQ
-#define DM0_LSOPAQUE NPORT_DMODE0_LISOPQ
-#define DM0_SHADE NPORT_DMODE0_SHADE
-#define DM0_LRONLY NPORT_DMODE0_LRONLY
-#define DM0_XYOFFSET NPORT_DMODE0_XYOFF
-#define DM0_CICLAMP NPORT_DMODE0_CLAMP
-#define DM0_ENDPTFILTER NPORT_DMODE0_ENDPF
-#define DM0_YSTRIDE NPORT_DMODE0_YSTR
-
-#define DM1_PLANES_SHIFT 0
-/* The rest of the DM1 planes defines are in newport.h */
-
-#define DM1_DRAWDEPTH_SHIFT 3
-#define DM1_DRAWDEPTH_MASK NPORT_DMODE1_DDMASK
-#define DM1_DRAWDEPTH NPORT_DMODE1_DD24 /* An alias? */
-#define DM1_DRAWDEPTH4 NPORT_DMODE1_DD4
-#define DM1_DRAWDEPTH8 NPORT_DMODE1_DD8
-#define DM1_DRAWDEPTH12 NPORT_DMODE1_DD12
-#define DM1_DRAWDEPTH24 NPORT_DMODE1_DD24
-
-#define DM1_DBLSRC NPORT_DMODE1_DSRC
-#define DM1_YFLIP NPORT_DMODE1_YFLIP
-#define DM1_RWPACKED NPORT_DMODE1_RWPCKD
-
-#define DM1_HOSTDEPTH_SHIFT 8
-#define DM1_HOSTDEPTH_MASK NPORT_DMODE1_HDMASK
-#define DM1_HOSTDEPTH NPORT_DMODE1_HD32 /* An alias? */
-#define DM1_HOSTDEPTH4 NPORT_DMODE1_HD4
-#define DM1_HOSTDEPTH8 NPORT_DMODE1_HD8
-#define DM1_HOSTDEPTH12 NPORT_DMODE1_HD12
-#define DM1_HOSTDEPTH32 NPORT_DMODE1_HD32
-
-#define DM1_RWDOUBLE NPORT_DMODE1_RWDBL
-#define DM1_SWAPENDIAN NPORT_DMODE1_ESWAP
-
-#define DM1_COLORCOMPARE_SHIFT 12
-#define DM1_COLORCOMPARE_MASK NPORT_DMODE1_CCMASK
-#define DM1_COLORCOMPARE NPORT_DMODE1_CCMASK
-#define DM1_COLORCOMPLT NPORT_DMODE1_CCLT
-#define DM1_COLORCOMPEQ NPORT_DMODE1_CCEQ
-#define DM1_COLORCOMPGT NPORT_DMODE1_CCGT
-
-#define DM1_RGBMODE NPORT_DMODE1_RGBMD
-#define DM1_ENDITHER NPORT_DMODE1_DENAB
-#define DM1_FASTCLEAR NPORT_DMODE1_FCLR
-#define DM1_ENBLEND NPORT_DMODE1_BENAB
-
-#define DM1_SF_SHIFT 19
-#define DM1_SF_MASK NPORT_DMODE1_SFMASK
-#define DM1_SF NPORT_DMODE1_SFMASK
-#define DM1_SF_ZERO NPORT_DMODE1_SF0
-#define DM1_SF_ONE NPORT_DMODE1_SF1
-#define DM1_SF_DC NPORT_DMODE1_SFDC
-#define DM1_SF_MDC NPORT_DMODE1_SFMDC
-#define DM1_SF_SA NPORT_DMODE1_SFSA
-#define DM1_SF_MSA NPORT_DMODE1_SFMSA
-
-#define DM1_DF_SHIFT 22 /* dfactor(2:0) */
-#define DM1_DF_MASK NPORT_DMODE1_DFMASK
-#define DM1_DF NPORT_DMODE1_DFMASK
-#define DM1_DF_ZERO NPORT_DMODE1_DF0
-#define DM1_DF_ONE NPORT_DMODE1_DF1
-#define DM1_DF_SC NPORT_DMODE1_DFSC
-#define DM1_DF_MSC NPORT_DMODE1_DFMSC
-#define DM1_DF_SA NPORT_DMODE1_DFSA
-#define DM1_DF_MSA NPORT_DMODE1_DFMSA
-
-#define DM1_ENBACKBLEND NPORT_DMODE1_BBENAB
-#define DM1_ENPREFETCH NPORT_DMODE1_PFENAB
-#define DM1_BLENDALPHA NPORT_DMODE1_ABLEND
-
-#define DM1_LO_SHIFT 28
-#define DM1_LO NPORT_DMODE1_LOMASK
-#define DM1_LO_MASK NPORT_DMODE1_LOMASK
-#define DM1_LO_ZERO NPORT_DMODE1_LOZERO
-#define DM1_LO_AND NPORT_DMODE1_LOAND
-#define DM1_LO_ANDR NPORT_DMODE1_LOANDR
-#define DM1_LO_SRC NPORT_DMODE1_LOSRC
-#define DM1_LO_ANDI NPORT_DMODE1_LOANDI
-#define DM1_LO_DST NPORT_DMODE1_LODST
-#define DM1_LO_XOR NPORT_DMODE1_LOXOR
-#define DM1_LO_OR NPORT_DMODE1_LOOR
-#define DM1_LO_NOR NPORT_DMODE1_LONOR
-#define DM1_LO_XNOR NPORT_DMODE1_LOXNOR
-#define DM1_LO_NDST NPORT_DMODE1_LONDST
-#define DM1_LO_ORR NPORT_DMODE1_LOORR
-#define DM1_LO_NSRC NPORT_DMODE1_LONSRC
-#define DM1_LO_ORI NPORT_DMODE1_LOORI
-#define DM1_LO_NAND NPORT_DMODE1_LONAND
-#define DM1_LO_ONE NPORT_DMODE1_LOONE
-
-#define SMASK0 NPORT_CMODE_SM0
-#define SMASK1 NPORT_CMODE_SM1
-#define SMASK2 NPORT_CMODE_SM2
-#define SMASK3 NPORT_CMODE_SM3
-#define SMASK4 NPORT_CMODE_SM4
-#define ALL_SMASKS 0x1f
-
-#define CM_CIDMATCH_SHIFT 9
-#define CM_CIDMATCH_MASK NPORT_CMODE_CMSK
-
-#define REX3VERSION_MASK NPORT_STAT_VERS
-#define GFXBUSY NPORT_STAT_GBUSY
-#define BACKBUSY NPORT_STAT_BBUSY
-#define VRINT NPORT_STAT_VRINT
-#define VIDEOINT NPORT_STAT_VIDINT
-#define GFIFO_LEVEL_SHIFT 7
-#define GFIFO_LEVEL_MASK NPORT_STAT_GLMSK
-#define BFIFO_LEVEL_SHIFT 13
-#define BFIFO_LEVEL_MASK NPORT_STAT_BLMSK
-#define BFIFO_INT NPORT_STAT_BFIRQ
-#define GFIFO_INT NPORT_STAT_GFIRQ
-
-#define GIO32MODE NPORT_CFG_G32MD
-#define BUSWIDTH NPORT_CFG_BWIDTH
-#define EXTREGXCVR NPORT_CFG_ERCVR
-#define BFIFODEPTH_SHIFT 3
-#define BFIFODEPTH_MASK NPORT_CFG_BDMSK
-#define BFIFOABOVEINT NPORT_CFG_BFAINT
-#define GFIFODEPTH_SHIFT 8
-#define GFIFODEPTH_MASK NPORT_CFG_GDMSK
-#define GFIFOABOVEINT NPORT_CFG_GFAINT
-#define TIMEOUT_SHIFT 14
-#define TIMEOUT_MASK NPORT_CFG_TOMSK
-#define VREFRESH_SHIFT 17
-#define VREFRESH_MASK NPORT_CFG_VRMSK
-#define FB_TYPE NPORT_CFG_FBTYP
-
-#define DCB_DATAWIDTH_MASK (0x3)
-
-#define DCB_CRS_MASK (0x7 << DCB_CRS_SHIFT)
-#define DCB_ADDR_MASK (0xf << DCB_ADDR_SHIFT)
-#define DCB_CSWIDTH_MASK (0x1f << DCB_CSWIDTH_SHIFT)
-#define DCB_CSHOLD_MASK (0x1f << DCB_CSHOLD_SHIFT)
-#define DCB_CSSETUP_MASK (0x1f << DCB_CSSETUP_SHIFT)
-
-#define DCB_SWAPENDIAN (1 << 28)
-
-#define REX3WAIT(rex3) while ((rex3)->p1.set.status & GFXBUSY)
-#define BFIFOWAIT(rex3) while ((rex3)->p1.set.status & BACKBUSY)
-
-#define REX3_GIO_ADDR_0 0x1f0f0000
-#define REX3_GIO_ADDR_1 0x1f4f0000
-#define REX3_GIO_ADDR_2 0x1f8f0000
-#define REX3_GIO_ADDR_3 0x1fcf0000
-
-#define NG1_XSIZE 1280
-#define NG1_YSIZE 1024
-
-#endif
diff -puN include/asm-mips/sgi/sgi.h~mips-sgi-ip22-updates include/asm-mips/sgi/sgi.h
--- 25/include/asm-mips/sgi/sgi.h~mips-sgi-ip22-updates 2005-01-29 11:25:53.142790376 -0800
+++ 25-akpm/include/asm-mips/sgi/sgi.h 2005-01-29 11:25:53.153788704 -0800
@@ -28,8 +28,8 @@ enum sgi_mach {
ip26, /* TFP UP, Indigo2 */
ip27, /* R10k MP, R12k MP, Origin */
ip28, /* R10k UP, Indigo2 */
- ip30,
- ip32,
+ ip30, /* Octane */
+ ip32, /* O2 */
};
extern enum sgi_mach sgimach;
diff -puN include/video/newport.h~mips-sgi-ip22-updates include/video/newport.h
--- 25/include/video/newport.h~mips-sgi-ip22-updates 2005-01-29 11:25:53.144790072 -0800
+++ 25-akpm/include/video/newport.h 2005-01-29 11:25:53.155788400 -0800
@@ -291,8 +291,6 @@ struct newport_regs {
unsigned int _unused2[0x1ef];
struct newport_cregs cgo;
};
-extern struct newport_regs *npregs;
-
typedef struct {
unsigned int drawmode1;
@@ -450,38 +448,26 @@ static __inline__ void newport_cmap_setr
/* Miscellaneous NEWPORT routines. */
#define BUSY_TIMEOUT 100000
-static __inline__ int newport_wait(void)
+static __inline__ int newport_wait(struct newport_regs *regs)
{
- int i = 0;
+ int t = BUSY_TIMEOUT;
- while(i < BUSY_TIMEOUT)
- if(!(npregs->cset.status & NPORT_STAT_GBUSY))
+ while (t--)
+ if (!(regs->cset.status & NPORT_STAT_GBUSY))
break;
- if(i == BUSY_TIMEOUT)
- return 1;
- return 0;
+ return !t;
}
-static __inline__ int newport_bfwait(void)
+static __inline__ int newport_bfwait(struct newport_regs *regs)
{
- int i = 0;
+ int t = BUSY_TIMEOUT;
- while(i < BUSY_TIMEOUT)
- if(!(npregs->cset.status & NPORT_STAT_BBUSY))
+ while (t--)
+ if(!(regs->cset.status & NPORT_STAT_BBUSY))
break;
- if(i == BUSY_TIMEOUT)
- return 1;
- return 0;
+ return !t;
}
-/* newport.c and cons_newport.c routines */
-extern struct graphics_ops *newport_probe (int, const char **);
-
-void newport_save (void *);
-void newport_restore (void *);
-void newport_reset (void);
-int newport_ioctl (int card, int cmd, unsigned long arg);
-
/*
* DCBMODE register defines:
*/
@@ -564,7 +550,7 @@ xmap9FIFOWait (struct newport_regs *rex)
{
rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
- newport_bfwait ();
+ newport_bfwait (rex);
while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
;
_