Ð þí2{8.Ô(§.œ1Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1 !qcom,ipq4019,reserved-memory=smem@87e00000D‡àHtz@87e80000D‡èHaliasesO/soc/spi@78b5000T/soc/spi@78b6000Y/soc/i2c@78b7000^/soc/i2c@78b8000c/soc/serial@78af000cpuscpu@0kcpu!arm,cortex-a7wqcom,kpss-acc-v2…–ŸD¨ ¯¿èÍcpu@1kcpu!arm,cortex-a7wqcom,kpss-acc-v2…–ŸD¨ ¯¿èÍcpu@2kcpu!arm,cortex-a7wqcom,kpss-acc-v2…– Ÿ D¨ ¯¿èÍcpu@3kcpu!arm,cortex-a7wqcom,kpss-acc-v2…– Ÿ D¨ ¯¿èÍl2-cache!cache០íopp_table0!operating-points-v2õíopp-48000000Ülèopp-200000000 ëÂèopp-500000000Íeèopp-716000000*­KèmemorykmemoryDpmu!arm,cortex-a7-pmu clockssleep_clk !fixed-clock¯}#gcc_sleep_clk_src6íxo !fixed-clock¯Ül6firmwarescm!qcom,scm-ipq4019timer!arm,armv7-timer0¯ÜlCsoc= !simple-businterrupt-controller@b000000!qcom,msm-qgic2MbD  íclock-controller@1800000!qcom,gcc-ipq40196sD€írng@22000 !qcom,prngD @¨+€coreŒokaypinctrl@1000000!qcom,ipq4019-pinctrlD0“£d¯Mb Ðíserial_pinmuxímux»gpio60gpio61 Àblsp_uart0Éspi_0_pinmuxípinmux Àblsp_spi0»gpio55gpio56gpio57pinmux_csÀgpio»gpio54pinconf»gpio55gpio56gpio57Ö Épinconf_cs»gpio54ÖÉåregulator@1948000!qcom,vqmmc-ipq4019-regulatorD”€ñvqmmcã`-ÆÀ0 Œdisabledsdhci@7824900!qcom,sdhci-msm-v4D‚I‚@{ŠDhc_irqpwr_irqT¨/.€coreifacexo Œdisableddma@7884000!qcom,bam-v1.7.0Dˆ@0 bam_clk^iŒokayíspi@78b5000!qcom,spi-qup-v2.2.1D‹P _¨ €coreifaceqvrxtxŒokay€Šdefault ˜6mx25l25635e@0D !mx25l25635e¡n6spi@78b6000!qcom,spi-qup-v2.2.1D‹` `¨ €coreifaceqvrxtx Œdisabledi2c@78b7000!qcom,i2c-qup-v2.2.1D‹p a¨ €ifacecoreq vrxtx Œdisabledi2c@78b8000!qcom,i2c-qup-v2.2.1D‹€ b¨ €ifacecoreq  vrxtx Œdisableddma@8e04000!qcom,bam-v1.7.0Dà@ Ϩ!€bam_clk^i³Œokayícrypto@8e3a000!qcom,crypto-v5.1Dã `¨!"#€ifacebuscoreqvrxtxŒokayclock-controller@b088000!qcom,kpss-acc-v2D € €íclock-controller@b098000!qcom,kpss-acc-v2D € €íclock-controller@b0a8000!qcom,kpss-acc-v2D € €í clock-controller@b0b8000!qcom,kpss-acc-v2D € €í regulator@b089000 !qcom,saw2D  Ìíregulator@b099000 !qcom,saw2D  Ìíregulator@b0a9000 !qcom,saw2D  Ìí regulator@b0b9000 !qcom,saw2D  Ìí regulator@b012000 !qcom,saw2D  Ìí serial@78af000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmDŠð kŒokay¨ €coreifaceqvrxtx€Šdefaultserial@78b0000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD‹ l Œdisabled¨ €coreifaceqvrxtxwatchdog@b017000$!qcom,kpss-wdtqcom,kpss-wdt-ipq4019D p@¨Ö Œokayrestart@4ab000 !qcom,psholdDJ°pci@40000000!qcom,pcie-ipq4019snps,dw-pcie D@@ ¨ @âdbielbiparfconfigkpciìýÿ0=@ ‚@0@0Ð Dmsib€$Ž‘¨'()€auxmaster_busslave_bus`2X9axi_maxi_spipeaxi_m_vmidaxi_s_xpuparfphyaxi_m_stickypipe_stickypwrahbphy_ahb Œdisableddma@7984000!qcom,bam-v1.7.0D˜@  e¨-€bam_clk^i Œdisabledínand-controller@79b0000!qcom,ipq4019-nandD›¨-, €coreaonq vtxrxcmd Œdisablednand@0DEWjwifi@a000000!qcom,ipq4019-wifiD 02\9wifi_cpu_initwifi_radio_srifwifi_radio_warmwifi_radio_coldwifi_core_warmwifi_core_cold¨;<=*€wifi_wcss_cmdwifi_wcss_refwifi_wcss_rtcÌ !"#$%&'()*+,-./¨]Dmsi0msi1msi2msi3msi4msi5msi6msi7msi8msi9msi10msi11msi12msi13msi14msi15legacyŒokaywifi@a800000!qcom,ipq4019-wifiD € 02   \9wifi_cpu_initwifi_radio_srifwifi_radio_warmwifi_radio_coldwifi_core_warmwifi_core_cold¨>?@*€wifi_wcss_cmdwifi_wcss_refwifi_wcss_rtcÌ0123456789:;<=>?©]Dmsi0msi1msi2msi3msi4msi5msi6msi7msi8msi9msi10msi11msi12msi13msi14msi15legacyŒokaymdio@90000!qcom,ipq4019-mdioD d Œdisabledethernet-phy@0Dethernet-phy@1Dethernet-phy@2Dethernet-phy@3Dethernet-phy@4Dssphy@9a000!qcom,usb-ss-ipq4019-phyyD   âphy_base2 9por_rst Œdisabledíhsphy@a6000!qcom,usb-hs-ipq4019-phyyD `@ âphy_base2 9por_rstsrif_rst Œdisabledíusb3@8af8800 !qcom,dwc3D¯ˆ¨89:€mastersleepmock_utmi= Œdisableddwc3@8a00000 !snps,dwc3D € „„‰usb2-phyusb3-phy“hosthsphy@a8000!qcom,usb-hs-ipq4019-phyyD €@ âphy_base29por_rstsrif_rst Œdisabledíusb2@60f8800 !qcom,dwc3Dˆ¨567€mastersleepmock_utmi= Œdisableddwc3@6000000 !snps,dwc3D€ ˆ„ ‰usb2-phy“hostchosen›serial0:115200n8 #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapspi0spi1i2c0i2c1serial0device_typeenable-methodnext-level-cacheqcom,accqcom,sawclocksclock-frequencyclock-latencyoperating-points-v2cache-levelphandleopp-sharedopp-hzclock-latency-nsinterruptsclock-output-names#clock-cellsalways-oninterrupt-controller#interrupt-cells#reset-cellsclock-namesstatusgpio-controllergpio-ranges#gpio-cellspinsfunctionbias-disabledrive-strengthoutput-highregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-oninterrupt-namesbus-width#dma-cellsqcom,eedmasdma-namespinctrl-0pinctrl-namescs-gpiosspi-max-frequencyqcom,controlled-remotelyregulatortimeout-secreg-nameslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapresetsreset-namesnand-ecc-strengthnand-ecc-step-sizenand-bus-width#phy-cellsphysphy-namesdr_modestdout-path