8(Sony Xperia Z!sony,xperia-yugaqcom,apq8064,reserved-memory=smem@80000000D HOwcnss@8f000000DpHOLcpuscpu@0 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOacpu@1 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOccpu@2 !qcom,kraitWqcom,kpss-acc-v1ecpuDq Oecpu@3 !qcom,kraitWqcom,kpss-acc-v1ecpuDq  Ogl2-cache!cacheOidle-statesspc#!qcom,idle-state-spcarm,idle-state OmemoryememoryDthermal-zonescpu-thermal0 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal1 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal2 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal3 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-pmu!qcom,krait-pmu : clockscxo_board !fixed-clockER$O0pxo_board !fixed-clockEROFsleep_clk !fixed-clockERO/hwmutex!qcom,sfpb-mutex b iOsmem !qcom,smemwsmd !qcom,smdmodem@0 :%  disabledq6@1 :Z  disableddsps@3 : @ disabledriva@6 :  disabledsmsm !qcom,smsm    @apps@0DOVmodem@1D :&q6@2D :Ywcnss@3D :OKdsps@4D :firmwarescm!qcom,scm-apq8064 coreiio-hwmon !iio-hwmonT'   soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@3CZO :[defaultiOsdc4-gpiosO@pios*sgpio63gpio64gpio65gpio66gpio67gpio68xsdc4sdcc1-pin-activeO9clk ssdc1_clkcmd ssdc1_cmd data ssdc1_data sdcc3-pin-activeO=clk ssdc3_clkcmd ssdc3_cmddata ssdc3_dataps_holdOmuxsgpio78xps_holdi2c1Omuxsgpio20gpio21xgsbi1pinconfsgpio20gpio21i2c1_pins_sleepOmuxsgpio20gpio21xgpiopinconfsgpio20gpio21gsbi1_uart_2pinsmuxsgpio18gpio19xgsbi1gsbi1_uart_4pinsmuxsgpio18gpio19gpio20gpio21xgsbi1i2c2Omuxsgpio24gpio25xgsbi2pinconfsgpio24gpio25i2c2_pins_sleepOmuxsgpio24gpio25xgpiopinconfsgpio24gpio25i2c3Omux sgpio8gpio9xgsbi3pinconf sgpio8gpio9i2c3_pins_sleepOmux sgpio8gpio9xgpiopinconf sgpio8gpio9i2c4Omuxsgpio12gpio13xgsbi4pinconfsgpio12gpio13i2c4_pins_sleepOmuxsgpio12gpio13xgpiopinconfsgpio12gpio13spi5_defaultO pinmuxsgpio51gpio52gpio54xgsbi5pinmux_csxgpiosgpio53pinconfsgpio51gpio52gpio54pinconf_cssgpio53spi5_sleepO!pinmuxxgpiosgpio51gpio52gpio53gpio54pinconfsgpio51gpio52gpio53gpio54i2c6O"muxsgpio16gpio17xgsbi6pinconfsgpio16gpio17i2c6_pins_sleepO#muxsgpio16gpio17xgpiopinconfsgpio16gpio17gsbi6_uart_2pinsmuxsgpio14gpio15xgsbi6gsbi6_uart_4pinsmuxsgpio14gpio15gpio16gpio17xgsbi6gsbi7_uart_2pinsmuxsgpio82gpio83xgsbi7gsbi7_uart_4pinsmuxsgpio82gpio83gpio84gpio85xgsbi7i2c7O$muxsgpio84gpio85xgsbi7pinconfsgpio84gpio85i2c7_pins_sleepO%muxsgpio84gpio85xgpiopinconfsgpio84gpio85riva-fm-activesgpio14gpio15xriva_fmOQriva-bt-activesgpio16gpio17xriva_btOPriva-wlan-active#sgpio64gpio65gpio66gpio67gpio68 xriva_wlanOOhdmi-pinctrlOGmuxsgpio70gpio71gpio72xhdmipinconf_ddcsgpio70gpio71pinconf_hpdsgpio72gsbi5-uart-pin-activeOrxsgpio52xgsbi5txsgpio51xgsbi5sdcc3-cd-pin-activesgpio26xgpioO>syscon@1200000!sysconD O interrupt-controller@2000000!qcom,msm-qgic2D Otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$:DRclock-controller@2088000!qcom,kpss-acc-v1DOclock-controller@2098000!qcom,kpss-acc-v1D Oclock-controller@20a8000!qcom,kpss-acc-v1D Oclock-controller@20b8000!qcom,kpss-acc-v1D O power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2DOpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D Opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O sps-sic-non-secure@12100000!sysconDOgsbi@12440000 disabled!qcom,gsbi-v1.0.0DD iface=serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDE@ :  coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1i[defaultsleepDF :  coreiface disabledgsbi@12480000 disabled!qcom,gsbi-v1.0.0DH iface=i2c@124a0000!qcom,i2c-qup-v1.1.1DJi[defaultsleep :  coreiface disabledgsbi@16200000 disabled!qcom,gsbi-v1.0.0D  iface=i2c@16280000!qcom,i2c-qup-v1.1.1i[defaultsleepD( :  coreiface disabledgsbi@16300000 disabled!qcom,gsbi-v1.0.0D0 iface=i2c@16380000!qcom,i2c-qup-v1.1.1i[defaultsleepD8 :  coreiface disabledgsbi@1a200000okay!qcom,gsbi-v1.0.0D  iface= serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD$  :  coreifaceokay[defaultispi@1a280000!qcom,spi-qup-v1.1.1D( :i ![defaultsleep  coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0DP iface=serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDTP :  coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1i"#[defaultsleepDX :  coreiface disabledgsbi@16600000 disabled!qcom,gsbi-v1.0.0D` iface=serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDd` :  coreiface disabledi2c@16680000!qcom,i2c-qup-v1.1.1i$%[defaultsleepDh :  coreiface disabledrng@1a500000 !qcom,prngDP coressbi@c00000 !qcom,ssbiD pmic-arbiterpmic@1 !qcom,pm8821,:Lmpps@50!qcom,pm8821-mppqcom,ssbi-mppDP :3Oqcom,ssbi@500000 !qcom,ssbiDP pmic-arbiterpmic@0 !qcom,pm8921,:JO'gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioDP3C&,OO&gpio-keys-pin-activesgpio3gpio4gpio29gpio35xnormal(8ERfOimpps@50!qcom,pm8921-mppqcom,ssbi-mppDP3O`:rtc@11d!qcom,pm8921-rtc,':'D|pwrkey@1c!qcom,pm8921-pwrkeyD,':23= xoadc@197!qcom,pm8921-adcD 'NOadc-channel@0Dadc-channel@1Dadc-channel@2Dadc-channel@4Dadc-channel@8Dadc-channel@9D adc-channel@aD adc-channel@bD adc-channel@cD adc-channel@dD adc-channel@eDadc-channel@fDqfprom@700000 !qcom,qfpromDp=calibDO(backup_calibDO)clock-controller@900000!qcom,gcc-apq8064D@()calibcalib_backupEO clock-controller@28000000!qcom,lcc-apq8064D(Eclock-controller@4000000!qcom,mmcc-apq8064DEOAclock-controller@2011000!sysconDOrpm@108000!qcom,rpm-apq8064D $:ackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccEOregulators!qcom,rpm-pm8921-regulators *#*8*M+\*l,{,--s1((0O,s2  jORs3 0I>OMs4w@w@jO*s7  0O-s8!!jl1l2OOl3..O2l4w@w@O3l5-p-pO;l6-p-pO+l7:-pl8**l9--l10,@ ,@ OSl11--l12OOl14w@w@l15w@-pl16**l17l18OOl21l22'@'@l23w@w@l24 q0ONl25l26l27l28l29lvs1lvs2OTlvs3lvs4lvs5lvs6lvs7usb-switchhdmi-switchncpw@w@jusb@12500000 !qcom,ci-hdrcDPP :d ~ coreiface '< @CcoreOulpiXi.nusb-phyokayxotgO1ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/0 sleepref<1Cpor23O.usb@12520000 !qcom,ci-hdrcDRR : ) ' coreiface )'< dCcoreOulpiXi4nusb-phy disabledO5ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/0 sleepref<5CporO4usb@12530000 !qcom,ci-hdrcDSS : , * coreiface ,'< eCcoreOulpiXi6nusb-phy disabledO7ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/0 sleepref<7CporO6phy@1b400000!qcom,apq8064-sata-phy disabledD@phy_mem -cfgO8sata@29000000!qcom,apq8064-ahcigeneric-ahci disabledD) :( ; . )slave_ifaceifacebusrxoobcore_pmalive 'i8 nsata-phydma@12402000!qcom,bam-v1.3.0D@  :b nbam_clkO:dma@12182000!qcom,bam-v1.3.0D  :` pbam_clkO<dma@121c2000!qcom,bam-v1.3.0D  :_ qbam_clkO?amba !simple-bus=sdcc@12400000okay!arm,pl18xarm,primecell[defaulti9D@  :hcmd_irq x nmclkapb_pclk 2::7txrxA;M*sdcc@12180000!arm,pl18xarm,primecellokayD  :fcmd_irq z pmclkapb_pclk  qZ2<<7txrxA+ c[defaulti=>sdcc@121c0000!arm,pl18xarm,primecell disabledD  :ecmd_irq { qmclkapb_pclk l2??7txrx[defaulti@syscon@1a400000!qcom,tcsr-apq8064sysconD@Oadreno-3xx@4300000!qcom,adreno-320.2qcom,adrenoD0kgsl_3d0_reg_memory :P kgsl_3d0_irqcoreifacememmem_iface AGAA!AlBBBBBBBBBB B B B B BBBBBBBBBBBBBBBBBBCCCCCCCCCC C C C C CCCCCCCCCCCCCCCCCCqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0stqcom,gpu-pwrlevel@1ssyscon@5700000!sysconDppOEmdss_dsi@4700000!qcom,mdss-dsi-ctrlMDSS DSI CTRL->0 :RDp dsi_ctrl8AAAA9ATAjAX(ifacebuscore_mmsssrcbytepixelcore ASAWA8Ai DDDDEiDportsport@0Dendpointport@1Dendpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960EDppp\"dsi_plldsi_phydsi_phy_regulatoriface_clkref AFODiommu@7500000!qcom,apq8064-iommusmmu_pclkiommu_clkA ADP:?@OIiommu@7600000!qcom,apq8064-iommusmmu_pclkiommu_clkA AD`:=>OJiommu@7c00000!qcom,apq8064-iommusmmu_pclkiommu_clkA A!D:EFOBiommu@7d00000!qcom,apq8064-iommusmmu_pclkiommu_clkA A!D:OCpci@1b500000!qcom,pcie-apq8064snps,dw-pcie DPP `dbielbiparfconfigepci0= :msi$%&' + . -coreifacephy(< l k j i hCaxiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960[defaultiGDcore_physical :OA>A A*core_clkmaster_iface_clkslave_iface_clkiH nhdmi-phyportsport@0Dendpointport@1Dendpointhdmi-phy@4a00400!qcom,hdmi-phy-8960D`hdmi_phyhdmi_pllAslave_iface_clkOHmdp@5100000 !qcom,mdp4D :K0AMAAANA_A`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk lIIJJportsport@0Dendpointport@1Dendpointport@2Dendpointport@3Dendpointriva-pil@3204000!qcom,riva-pilD   @ ccudxepmuK wdogfatalwLMN *okay[default iOPQOUiris !qcom,wcn36600xo-3:RHSUTsmd-edge : rivawcnss !qcom,wcnss cWCNSS_CTRLuUbt!qcom,wcnss-btwifi!qcom,wcnss-wlan:txrxV V tx-enabletx-rings-emptyetb@1a01000"!arm,coresight-etb10arm,primecellD apb_pclkin-portsportendpointWOYtpiu@1a03000!!arm,coresight-tpiuarm,primecellD0 apb_pclkin-portsportendpointXOZreplicator !arm,coresight-static-replicator apb_pclkout-portsport@0DendpointYOWport@1DendpointZOXin-portsportendpoint[O`funnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@ apb_pclkin-portsport@0Dendpoint\Obport@1Dendpoint]Odport@4Dendpoint^Ofport@5Dendpoint_Ohout-portsportendpoint`O[etm@1a1c000"!arm,coresight-etm3xarm,primecellD apb_pclkaout-portsportendpointbO\etm@1a1d000"!arm,coresight-etm3xarm,primecellD apb_pclkcout-portsportendpointdO]etm@1a1e000"!arm,coresight-etm3xarm,primecellD apb_pclkeout-portsportendpointfO^etm@1a1f000"!arm,coresight-etm3xarm,primecellD apb_pclkgout-portsportendpointhO_aliases#/soc/gsbi@1a200000/serial@1a240000chosenserial0:115200n8gpio-keys !gpio-keys gpio-keys[defaultiicamera-focus camera_focus f&camera-snapshotcamera_snapshot f&volume-down volume_down f&rvolume-up volume_up f&#s #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controllergpio-ranges#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrpinctrl-1qcom,modeqcom,controller-typedrive-push-pullinput-enablepower-sourceqcom,drive-strengthqcom,pull-up-strengthallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_l1_l2_l12_l18-supplyvin_lvs_1_3_6-supplyvin_lvs_4_5_7-supplyvin_ncp-supplyvin_lvs2-supplyvin_l24-supplyvin_l25-supplyvin_l27-supplyvin_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyqcom,force-modeassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesremote-endpointcpuserial0stdout-pathinput-namelinux,input-typelinux,code