8|(DQualcomm APQ8064/IFC6410"!qcom,apq8064-ifc6410qcom,apq8064,reserved-memory=smem@80000000D HOwcnss@8f000000DpHOWcpuscpu@0 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOhcpu@1 !qcom,kraitWqcom,kpss-acc-v1ecpuDqOjcpu@2 !qcom,kraitWqcom,kpss-acc-v1ecpuDq Olcpu@3 !qcom,kraitWqcom,kpss-acc-v1ecpuDq  Onl2-cache!cacheOidle-statesspc#!qcom,idle-state-spcarm,idle-state OmemoryememoryDthermal-zonescpu-thermal0 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal1 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal2 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal3 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-pmu!qcom,krait-pmu : clockscxo_board !fixed-clockER$O0pxo_board !fixed-clockEROJsleep_clk !fixed-clockERO/hwmutex!qcom,sfpb-mutex b iOsmem !qcom,smemwsmd !qcom,smdmodem@0 :%  disabledq6@1 :Z  disableddsps@3 : @ disabledriva@6 :  disabledsmsm !qcom,smsm    @apps@0DO]modem@1D :&q6@2D :Ywcnss@3D :OVdsps@4D :firmwarescm!qcom,scm-apq8064 coreiio-hwmon !iio-hwmonT'   soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@3CZO :[defaultiOsdc4-gpiosOApios*sgpio63gpio64gpio65gpio66gpio67gpio68xsdc4sdcc1-pin-activeO:clk ssdc1_clkcmd ssdc1_cmd data ssdc1_data sdcc3-pin-activeclk ssdc3_clkcmd ssdc3_cmddata ssdc3_dataps_holdOmuxsgpio78xps_holdi2c1Omuxsgpio20gpio21xgsbi1pinconfsgpio20gpio21i2c1_pins_sleepOmuxsgpio20gpio21xgpiopinconfsgpio20gpio21gsbi1_uart_2pinsmuxsgpio18gpio19xgsbi1gsbi1_uart_4pinsmuxsgpio18gpio19gpio20gpio21xgsbi1i2c2Omuxsgpio24gpio25xgsbi2pinconfsgpio24gpio25i2c2_pins_sleepOmuxsgpio24gpio25xgpiopinconfsgpio24gpio25i2c3Omux sgpio8gpio9xgsbi3pinconf sgpio8gpio9i2c3_pins_sleepOmux sgpio8gpio9xgpiopinconf sgpio8gpio9i2c4Omuxsgpio12gpio13xgsbi4pinconfsgpio12gpio13i2c4_pins_sleepOmuxsgpio12gpio13xgpiopinconfsgpio12gpio13spi5_defaultOpinmuxsgpio51gpio52gpio54xgsbi5pinmux_csxgpiosgpio53pinconfsgpio51gpio52gpio54pinconf_cssgpio53spi5_sleepO pinmuxxgpiosgpio51gpio52gpio53gpio54pinconfsgpio51gpio52gpio53gpio54i2c6O"muxsgpio16gpio17xgsbi6pinconfsgpio16gpio17i2c6_pins_sleepO#muxsgpio16gpio17xgpiopinconfsgpio16gpio17gsbi6_uart_2pinsmuxsgpio14gpio15xgsbi6gsbi6_uart_4pinsO!muxsgpio14gpio15gpio16gpio17xgsbi6gsbi7_uart_2pinsO$muxsgpio82gpio83xgsbi7gsbi7_uart_4pinsmuxsgpio82gpio83gpio84gpio85xgsbi7i2c7O%muxsgpio84gpio85xgsbi7pinconfsgpio84gpio85i2c7_pins_sleepO&muxsgpio84gpio85xgpiopinconfsgpio84gpio85riva-fm-activesgpio14gpio15xriva_fmriva-bt-activesgpio16gpio17xriva_btriva-wlan-active#sgpio64gpio65gpio66gpio67gpio68 xriva_wlanhdmi-pinctrlONmuxsgpio70gpio71gpio72xhdmipinconf_ddcsgpio70gpio71pinconf_hpdsgpio72card_detectO?muxsgpio26xgpiopcie_pinmuxOMmuxsgpio27xgpioconfsgpio27 syscon@1200000!sysconD O interrupt-controller@2000000!qcom,msm-qgic2D Otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$:DRclock-controller@2088000!qcom,kpss-acc-v1DOclock-controller@2098000!qcom,kpss-acc-v1D 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F FFFFFFFFFFFFFFFFFFGGGGGGGGGG G G G G GGGGGGGGGGGGGGGGGGqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0Ltqcom,gpu-pwrlevel@1Lsyscon@5700000!sysconDppOImdss_dsi@4700000!qcom,mdss-dsi-ctrlZMDSS DSI CTRL->0 :RDp cdsi_ctrl8EEEE9ETEjEX(ifacebuscore_mmsssrcbytepixelcore ESEWE8Ei `HHHHwI)Hportsport@0Dendpointport@1Dendpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960E@Dppp\"cdsi_plldsi_phydsi_phy_regulatoriface_clkref EJOHiommu@7500000!qcom,apq8064-iommusmmu_pclkiommu_clkE EDP:?@OSiommu@7600000!qcom,apq8064-iommusmmu_pclkiommu_clkE ED`:=>OTiommu@7c00000!qcom,apq8064-iommusmmu_pclkiommu_clkE E!D:EFOFiommu@7d00000!qcom,apq8064-iommusmmu_pclkiommu_clkE E!D:OGpci@1b500000!qcom,pcie-apq8064snps,dw-pcie DPP `cdbielbiparfconfigepci0= :msi$%&' + . -coreifacephy( l k j i haxiahbporpciphyokayKLBiM[default hdmi-tx@4a00000!qcom,hdmi-tx-8960[defaultiNDccore_physical :OE>E E*core_clkmaster_iface_clkslave_iface_clk)O .hdmi-phyokayP*B :Hportsport@0DendpointDQOUport@1DendpointDROrhdmi-phy@4a00400!qcom,hdmi-phy-8960D`chdmi_phyhdmi_pllEslave_iface_clk@okayPOOmdp@5100000 !qcom,mdp4D :K0EMEEENE_E`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk ESSTTokayportsport@0Dendpointport@1Dendpointport@2Dendpointport@3DendpointDUOQriva-pil@3204000!qcom,riva-pilD   @ cccudxepmufV wdogfatalwWTKaXn+ disabledO\iris !qcom,wcn36600xo{3YZ[smd-edge : Zrivawcnss !qcom,wcnss WCNSS_CTRL\bt!qcom,wcnss-btwifi!qcom,wcnss-wlan:txrx] ] tx-enabletx-rings-emptyetb@1a01000"!arm,coresight-etb10arm,primecellD apb_pclkin-portsportendpointD^O`tpiu@1a03000!!arm,coresight-tpiuarm,primecellD0 apb_pclkin-portsportendpointD_Oareplicator !arm,coresight-static-replicator apb_pclkout-portsport@0DendpointD`O^port@1DendpointDaO_in-portsportendpointDbOgfunnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@ apb_pclkin-portsport@0DendpointDcOiport@1DendpointDdOkport@4DendpointDeOmport@5DendpointDfOoout-portsportendpointDgObetm@1a1c000"!arm,coresight-etm3xarm,primecellD apb_pclkhout-portsportendpointDiOcetm@1a1d000"!arm,coresight-etm3xarm,primecellD apb_pclkjout-portsportendpointDkOdetm@1a1e000"!arm,coresight-etm3xarm,primecellD apb_pclklout-portsportendpointDmOeetm@1a1f000"!arm,coresight-etm3xarm,primecellD apb_pclknout-portsportendpointDoOfregulator-fixed@1!regulator-fixed2Z2Z ext_3p3vvoltage M':OBaliases#L/soc/gsbi@16600000/serial@16640000#T/soc/gsbi@16500000/serial@16540000 \/soc/gsbi@12440000/i2c@12460000 a/soc/gsbi@12480000/i2c@124a0000 f/soc/gsbi@16200000/i2c@16280000 k/soc/gsbi@16300000/i2c@16380000 p/soc/gsbi@1a200000/spi@1a280000chosenuserial0:115200n8pwrseq !simple-bussdcc4_pwrseq[defaultip!mmc-pwrseq-simple '+ODleds !gpio-leds[defaultiqled@1Zapq8064:green:user1 &'onhdmi-out!hdmi-connectorldportendpointDrOR #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controllergpio-ranges#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modepinctrl-1pagesizenum-cscs-gpiosqcom,controller-typepower-sourceallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_lvs1_3_6-supplyvin_lvs2-supplyvin_lvs4_5_7-supplyvdd_l1_l2_l12_l18-supplyvdd_l24-supplyvdd_l25-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implementedtarget-supply#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosmmc-pwrseqiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvdda-supplyvdda_phy-supplyvdda_refclk-supplyperst-gpiocore-vdda-supplyhdmi-mux-supplyhpd-gpiosremote-endpointvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namescpuregulator-nameregulator-typestartup-delay-usenable-active-highregulator-boot-onserial0serial1i2c0i2c1i2c2i2c3spi0stdout-pathreset-gpiosdefault-state