́8( $rockchip,rk3399-evbrockchip,rk3399 +!7Rockchip RK3399 Evaluation Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid cpu@1cpuarm,cortex-a53pscid cpu@2cpuarm,cortex-a53pscid cpu@3cpuarm,cortex-a53pscid cpu@100cpuarm,cortex-a72psci  cpu@101cpuarm,cortex-a72psci  idle-statespscicpu-sleeparm,idle-state+<Sxdt cluster-sleeparm,idle-state+<Sdt display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmu pmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Gaclkaclk-perfhclkpm0123syslegacyclient*`=KZ b,gpcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38q8x(coremgmtmgmt-stickypipepmpclkaclk disabled  defaultinterrupt-controllerethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macx stmmacethokayinput,7rgmiidefault @P f'P{(mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-samplexyreset disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр  Lbiuciuciu-driveciu-samplexzreset disabledmmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbemmc_cardclockb gphy_arasanokayxusb@fe380000 generic-ehci8bgusbokayusb@fe3a0000 generic-ohci:bgusbokayusb@fe3c0000 generic-ehci<bgusbokayusb@fe3e0000 generic-ohci> bgusbokayusb@fe800000rockchip,rk3399-dwc3+q0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkx% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspend#otgbgusb2-phyusb3-phy +utmi_wide4Lm disabledusb@fe900000rockchip,rk3399-dwc3+q0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkx& usb3-otg disabledusb@fe900000 snps,dwc3nrefbus_earlysuspend#otgb !gusb2-phyusb3-phy +utmi_wide4Lm disableddp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrfb"# xHJspdifdptxapbcore disabledportsport+endpoint@0$endpoint@1%interrupt-controller@fee00000 arm,gic-v3+qP  interrupt-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0 interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc> Pesaradcapb_pclkx saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default&+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default'+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default(+ disabledi2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default)+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default*+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default++ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc)default, disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb)default- disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd)default.okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke)default/ disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkD60 0 ;txrxdefault1234+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk560 0 ;txrxdefault5678+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4600;txrxdefault9:;<+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkC600;txrxdefault=>?@+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk6AA ;txrxdefaultBCDE+ disabledthermal-zonescpu-thermalEd[iFtripscpu_alert0yppassiveGcpu_alert1y$passiveHcpu_critys criticalcooling-mapsmap0Gmap1HHgpu-thermalEd[iFtripsgpu_alert0y$passiveIgpu_critys criticalcooling-mapsmap0I Jtsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclkx tsadc-apbsinitdefaultsleepKLK disabledFqos@ffa58000rockchip,rk3399-qossyscon Tqos@ffa5c000rockchip,rk3399-qossyscon Uqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Xqos@ffa70080rockchip,rk3399-qossyscon Yqos@ffa74000rockchip,rk3399-qossyscon@ Vqos@ffa76000rockchip,rk3399-qossyscon` Wqos@ffa90000rockchip,rk3399-qossyscon Zqos@ffa98000rockchip,rk3399-qossyscon Mqos@ffaa0000rockchip,rk3399-qossyscon [qos@ffaa0080rockchip,rk3399-qossyscon \qos@ffaa8000rockchip,rk3399-qossyscon ]qos@ffaa8080rockchip,rk3399-qossyscon ^qos@ffab0000rockchip,rk3399-qossyscon Nqos@ffab0080rockchip,rk3399-qossyscon Oqos@ffab8000rockchip,rk3399-qossyscon Pqos@ffac0000rockchip,rk3399-qossyscon Qqos@ffac0080rockchip,rk3399-qossyscon Rqos@ffac8000rockchip,rk3399-qossyscon _qos@ffac8080rockchip,rk3399-qossyscon `qos@ffad0000rockchip,rk3399-qossyscon aqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Spower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+power-domain@34"Mpower-domain@33!NOpower-domain@31Ppower-domain@32 QRpower-domain@35#Spower-domain@25lpower-domain@23Tpower-domain@22fUpower-domain@27LVpower-domain@28Wpower-domain@8~}power-domain@9 power-domain@24XYpower-domain@15+power-domain@21rZpower-domain@19[\power-domain@20]^power-domain@16+power-domain@17_`power-domain@18asyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2vio-domains&rockchip,rk3399-pmu-io-voltage-domain disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5bbspiclkapb_pclk<defaultcdef+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7bb"baudclkapb_pclkf)defaultg disabledi2c@ff3c0000rockchip,rk3399-i2c<b  b b i2cpclk9defaulth+okaypmic@1brockchip,rk808 idefaultj!rk808-clkout1rk808-clkout2/k;kGkSk_kkkwkkkkklregulatorsDCDC_REG1vdd_log qpq+regulator-state-mem=U DCDC_REG2 vdd_cpu_l qpq+regulator-state-memqDCDC_REG3vcc_ddr+regulator-state-mem=DCDC_REG4vcc_1v8w@w@+regulator-state-mem=Uw@LDO_REG1 vcc1v8_dvpw@w@+regulator-state-memqLDO_REG2 vcc3v0_tp--+regulator-state-memqLDO_REG3 vcc1v8_pmuw@w@+lregulator-state-mem=Uw@LDO_REG4vcc_sdw@-+regulator-state-mem=U-LDO_REG5vcca3v0_codec--+regulator-state-memqLDO_REG6vcc_1v5``+regulator-state-mem=U`LDO_REG7vcca1v8_codecw@w@+regulator-state-memqLDO_REG8vcc_3v0--+regulator-state-mem=U-SWITCH_REG1 vcc3v3_s3+regulator-state-mem=SWITCH_REG2 vcc3v3_s0+regulator-state-memqregulator@40silergy,syr827@ vdd_cpu_b 4`+mregulator-state-memqregulator@41silergy,syr828Avdd_gpu 4`+mregulator-state-memqi2c@ff3d0000rockchip,rk3399-i2c=b  b b i2cpclk8defaultn+ disabledi2c@ff3e0000rockchip,rk3399-i2c>b  b b i2cpclk:defaulto+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultpbokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultqb disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultrbokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaultsbokayvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu aclkhclktiommu@ff650800rockchip,iommue@svpu_mmu aclkifacetvideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccoreu iommu@ff660480rockchip,iommu f@f@u vdec_mmu aclkiface uiommu@ff670800rockchip,iommug@*iep_mmu aclkiface disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkxjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  apb_pclkAdma-controller@ff6e0000arm,pl330arm,primecelln@  apb_pclk0pmu-clock-controller@ff750000rockchip,rk3399-pmucruuvb(Jbclock-controller@ff760000rockchip,rk3399-cruv@BCx@#g/;рxh<4`#Fׄׄ syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain disabledmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf disabledusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokayhost-port linestateokay,wotg-port0ghjotg-bvalidotg-idlinestate disabledusb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokayhost-port linestateokay,wotg-port0lmootg-bvalidotg-idlinestate disabled phy@f780rockchip,rk3399-emmc-phy$xemmcclkokaypcie-phyrockchip,rk3399-pcie-phyrefclkx 2phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~xLuphyuphy-pipeuphy-tcphy disableddp-port"usb3-portphy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref xMuphyuphy-pipeuphy-tcphy disableddp-port#usb3-port!watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB6A;tx mclkhclkUdefaulty disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'6AA;txrxi2s_clki2s_hclkVdefaultz disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(6AA;txrxi2s_clki2s_hclkWdefault{ disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)6AA;txrxi2s_clki2s_hclkX disabledvop@ff8f0000rockchip,rk3399-vop-lit>wׄaclk_vopdclk_vophclk_vop|x axiahbdclk disabledport+ endpoint@0}endpoint@1~endpoint@2endpoint@3endpoint@4%iommu@ff8f3f00rockchip,iommu?w vopl_mmu aclkiface disabled|vop@ff900000rockchip,rk3399-vop-big>vׄaclk_vopdclk_vophclk_vopx axiahbdclkokayport+ endpoint@0endpoint@1endpoint@2endpoint@3endpoint@4$iommu@ff903f00rockchip,iommu?v vopb_mmu aclkifaceokayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclkbgdphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ isp0_mmu aclkifaceiommu@ff924000rockchip,iommu @P, isp1_mmu aclkifacehdmi-soundsimple-audio-card:i2sS mhdmi-sound disabledsimple-audio-card,cpusimple-audio-card,codechdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfvpll) disabledportsport+endpoint@0endpoint@1mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfxapb+ disabledports+port@0+endpoint@0endpoint@1}mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfxapb+ disabledports+port@0+endpoint@0endpoint@1edp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultxdpokayports+port@0+endpoint@0endpoint@1~port@1+endpoint@0gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpu# disabledJpinctrlrockchip,rk3399-pinctrlv+qgpio0@ff720000rockchip,gpio-bankrbgpio1@ff730000rockchip,gpio-banksbigpio2@ff780000rockchip,gpio-bankxPgpio3@ff788000rockchip,gpio-bankxQgpio4@ff790000rockchip,gpio-bankyRpcfg-pull-uppcfg-pull-downpcfg-pull-nonepcfg-pull-none-12ma pcfg-pull-none-13ma pcfg-pull-none-18mapcfg-pull-none-20mapcfg-pull-up-2mapcfg-pull-up-8mapcfg-pull-up-18mapcfg-pull-up-20mapcfg-pull-down-4mapcfg-pull-down-8mapcfg-pull-down-12ma pcfg-pull-down-18mapcfg-pull-down-20mapcfg-output-highpcfg-output-low clockclk-32k edpedp-hpd gmacrgmii-pins     rmii-pins      i2c0i2c0-xfer hi2c1i2c1-xfer &i2c2i2c2-xfer 'i2c3i2c3-xfer (i2c4i2c4-xfer   ni2c5i2c5-xfer   )i2c6i2c6-xfer   *i2c7i2c7-xfer +i2c8i2c8-xfer oi2s0i2s0-2ch-bus` i2s0-8ch-bus zi2s1i2s1-2ch-busP {sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    sdmmc-clk  sdmmc-cmd  sdmmc-cd sdmmc-wp suspendap-pwroff ddrio-pwroff spdifspdif-bus yspdif-bus-1 spi0spi0-clk 1spi0-cs0 4spi0-cs1 spi0-tx 2spi0-rx 3spi1spi1-clk  5spi1-cs0  8spi1-rx 7spi1-tx 6spi2spi2-clk  9spi2-cs0  <spi2-rx  ;spi2-tx  :spi3spi3-clk cspi3-cs0 fspi3-rx espi3-tx dspi4spi4-clk =spi4-cs0 @spi4-rx ?spi4-tx >spi5spi5-clk Bspi5-cs0 Espi5-rx Dspi5-tx Ctestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin Kotp-out Luart0uart0-xfer ,uart0-cts uart0-rts uart1uart1-xfer   -uart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer .uart3uart3-xfer /uart3-cts uart3-rts uart4uart4-xfer guarthdcpuarthdcp-xfer pwm0pwm0-pin ppwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin qpwm1-pin-pull-down pwm2pwm2-pin rpwm2-pin-pull-down pwm3apwm3a-pin spwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm pmicpmic-int-l jusb2vcc5v0-host-en backlightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ 0 Iaedp-panellg,lp079qx1-sp0v N Xi  eportendpointexternal-gmac-clock fixed-clocksY@ clkin_gmacvdd-centerpwm-regulator Ia vdd_center 5\+okayvcc3v3-sysregulator-fixed vcc3v3_sys+2Z2Zkvcc5v0-sysregulator-fixed vcc5v0_sys+LK@LK@mvcc5v0-host-regulatorregulator-fixed r Kdefault vcc5v0_hostmwvcc-phy-regulatorregulator-fixedvcc_phy+ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesarasan,soc-ctl-syscondisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cells#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiforce-hpdrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsbrightness-levelsdefault-brightness-levelpwmsbacklightenable-gpiospower-supplyenable-active-high