8}(}$rockchip,rk3328-evbrockchip,rk3328 +7Rockchip RK3328 EVBaliases=/serial@ff110000E/serial@ff120000M/serial@ff130000U/i2c@ff150000Z/i2c@ff160000_/i2c@ff170000d/i2c@ff180000i/ethernet@ff540000s/ethernet@ff550000}/mmc@ff500000/mmc@ff510000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci cpu@1cpuarm,cortex-a53xpsci cpu@2cpuarm,cortex-a53xpsci cpu@3cpuarm,cortex-a53xpsci idle-states"pscicpu-sleeparm,idle-state/@Wxhxl2-cache0cacheopp_table0operating-points-v2opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2sAnalog disabledsimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0!defg, display-subsystemrockchip,display-subsystem? hdmi-soundsimple-audio-cardi2sHDMI disabledsimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0!   xin24m fixed-clockERn6bxin24mAi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s !)7ui2s_clki2s_hclk  txrx disabledi2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s !*8ui2s_clki2s_hclktxrx disabledi2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s !+9ui2s_clki2s_hclktxrx disabledspdif@ff030000rockchip,rk3328-spdif !.: umclkhclk txdefault disabledpdm@ff040000 rockchip,pdm=Rupdm_clkpdm_hclkrxdefaultsleep disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd7io-domains"rockchip,rk3328-io-voltage-domain disabledgpiorockchip,rk3328-grf-gpiopower-controller!rockchip,rk3328-power-controller+9power-domain@6power-domain@5power-domain@8Freboot-modesyscon-reboot-modeRBRBRB $RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart !7&ubaudclkapb_pclktxrxdefault 0= disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart !8'ubaudclkapb_pclktxrxdefault  !0= disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart !9(ubaudclkapb_pclktxrxdefault"0=okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c !$+7 ui2cpclkdefault# disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c !%+8 ui2cpclkdefault$okaypmic@18rockchip,rk805 %!Ebxin32krk805-clkout2default&Ghv''''((regulatorsDCDC_REG1 vdd_logic 4 regulator-state-mem#;B@DCDC_REG2vdd_arm 4 regulator-state-mem#;~DCDC_REG3vcc_ddrregulator-state-mem#DCDC_REG4vcc_io2Z2Z(regulator-state-mem#;2ZLDO_REG1vcc_18w@w@regulator-state-mem#;w@LDO_REG2 vcc18_emmcw@w@regulator-state-mem#;w@LDO_REG3vdd_10B@B@regulator-state-mem#;B@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c !&+9 ui2cpclkdefault) disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c !'+: ui2cpclkdefault* disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi !1+ uspiclkapb_pclk txrxdefault+,-. disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt !(pwm@ff1b0000rockchip,rk3328-pwm< upwmpclkdefault/W disabledpwm@ff1b0010rockchip,rk3328-pwm< upwmpclkdefault0W disabledpwm@ff1b0020rockchip,rk3328-pwm < upwmpclkdefault1W disabledpwm@ff1b0030rockchip,rk3328-pwm0 !2< upwmpclkdefault2W disableddma-controller@ff1f0000arm,pl330arm,primecell@!b uapb_pclkythermal-zonessoc-thermal3tripstrip-point0ppassivetrip-point1Lpassive4soc-crits criticalcooling-mapsmap040 tsadc@ff250000rockchip,rk3328-tsadc% !:$P$utsadcapb_pclkinitdefaultsleep56'51B 8tsadc-apbD7Qhokay3efuse@ff260000rockchip,rk3328-efuse&P+> upclk_efuse~ id@7cpu-leakage@17logic-leakage@19cpu-version@1aBadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( !P%usaradcapb_pclk1V 8saradc-apb disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500T!ZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 ubuscore1fiommu@ff330200rockchip,iommu3 !` h265e_mmu uaclkiface disablediommu@ff340800rockchip,iommu4@ !b vepu_mmuF uaclkiface disabledvideo-codec@ff350000rockchip,rk3328-vpu5 ! vdpuF uaclkhclk89iommu@ff350800rockchip,iommu5@ ! vpu_mmuF uaclkiface98iommu@ff360480rockchip,iommu 6@6@ !J rkvdec_mmuB uaclkiface disabledvop@ff370000rockchip,rk3328-vop7> ! x;uaclk_vopdclk_vophclk_vop1 8axiahbdclk: disabledport+ endpoint@0;@iommu@ff373f00rockchip,iommu7? ! vop_mmu; uaclkiface disabled:hdmi@ff3c0000rockchip,rk3328-dw-hdmi<0!#GFuiahbisfrcec<hdmidefault =>?D7 disabledportsportendpoint@;codec@ff410000rockchip,rk3328-codecA* upclkmclkD7 disabledphy@ff430000rockchip,rk3328-hdmi-phyC !SAyusysclkrefoclkrefpclk bhdmi_phyEB cpu-version disabled<clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconDD7E"x=&'(ABDC"\5H4$/zAAA|n6n6n6n6#FLGрxhxhрxhxhsyscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyAuphyclk busb480m_phyE{/CokayCotg-port$!;<=otg-bvalidotg-idlinestateokayThost-port !> linestateokayUmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@ !  =!JNubiuciuciu-driveciu-sampleFQрokay_i{defaultDEFGHmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@ ! 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