r8T( azw,beelink-a1rockchip,rk3328 + 7Beelink A1aliases=/serial@ff110000E/serial@ff120000M/serial@ff130000U/i2c@ff150000Z/i2c@ff160000_/i2c@ff170000d/i2c@ff180000i/ethernet@ff540000s/ethernet@ff550000}/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci  cpu@1cpuarm,cortex-a53xpsci  cpu@2cpuarm,cortex-a53xpsci  cpu@3cpuarm,cortex-a53xpsci  idle-statespscicpu-sleeparm,idle-state*;Rxcsl2-cache0cacheopp_table0operating-points-v2opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2s Analog A/V okaysimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0defg' display-subsystemrockchip,display-subsystem: hdmi-soundsimple-audio-cardi2sHDMI okaysimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clock@Mn6]xin24mEi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7pi2s_clki2s_hclk|  txrx okayi2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8pi2s_clki2s_hclk|txrx okayi2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9pi2s_clki2s_hclk|txrx  disabledspdif@ff030000rockchip,rk3328-spdif .: pmclkhclk| txdefault  disabledpdm@ff040000 rockchip,pdm=Rppdm_clkpdm_hclk|rxdefaultsleep  disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd9io-domains"rockchip,rk3328-io-voltage-domain okaygpiorockchip,rk3328-grf-gpio/Dpower-controller!rockchip,rk3328-power-controller;+<power-domain@6;power-domain@5;power-domain@8F;reboot-modesyscon-reboot-modeOVRBbRBpRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&pbaudclkapb_pclk|txrxdefault  !  disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'pbaudclkapb_pclk|txrxdefault "#$  disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(pbaudclkapb_pclk|txrxdefault% okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 pi2cpclkdefault&  disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 pi2cpclkdefault' okayMB@Spmic@18rockchip,rk805 (default)* **%*1=regulatorsDCDC_REG1 Ivdd_logicX `pp:regulator-state-memB@DCDC_REG2Ivdd_armX `ppregulator-state-mem~DCDC_REG3Ivcc_ddrregulator-state-memDCDC_REG4Ivcc_ioX2Zp2Zregulator-state-mem2ZLDO_REG1Ivdd_18Xw@pw@regulator-state-memw@LDO_REG2 Ivcc_18emmcXw@pw@regulator-state-memw@LDO_REG3Ivdd_11Xpregulator-state-memi2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 pi2cpclkdefault+  disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: pi2cpclkdefault,  disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ pspiclkapb_pclk| txrxdefault-./0  disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< ppwmpclkdefault1  disabledpwm@ff1b0010rockchip,rk3328-pwm< ppwmpclkdefault2  disabledpwm@ff1b0020rockchip,rk3328-pwm < ppwmpclkdefault3  disabledpwm@ff1b0030rockchip,rk3328-pwm0 2< ppwmpclkdefault4  disableddma-controller@ff1f0000arm,pl330arm,primecell@ papb_pclkthermal-zonessoc-thermal%3E5tripstrip-point0Upapassivetrip-point1ULapassive6soc-critUsa criticalcooling-mapsmap0l60q tsadc@ff250000rockchip,rk3328-tsadc% :$P$ptsadcapb_pclkinitdefaultsleep787B tsadc-apb9 okay  5efuse@ff260000rockchip,rk3328-efuse&P+> ppclk_efuse; id@7cpu-leakage@17logic-leakage@19cpu-version@1aOFadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( PT%psaradcapb_pclkV saradc-apb  disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"fgpgpmmupppp0ppmmu0pp1ppmmu1 pbuscorefv:iommu@ff330200rockchip,iommu3 ` fh265e_mmu paclkiface  disablediommu@ff340800rockchip,iommu4@ b fvepu_mmuF paclkiface  disabledvideo-codec@ff350000rockchip,rk3328-vpu5  fvdpuF paclkhclk;<iommu@ff350800rockchip,iommu5@  fvpu_mmuF paclkiface<;iommu@ff360480rockchip,iommu 6@6@ J frkvdec_mmuB paclkiface  disabledvop@ff370000rockchip,rk3328-vop7>  x;paclk_vopdclk_vophclk_vop axiahbdclk= okayport+ endpoint@0>Ciommu@ff373f00rockchip,iommu7?  fvop_mmu; paclkiface okay=hdmi@ff3c0000rockchip,rk3328-dw-hdmi<#GFpiahbisfrcec?hdmidefault @AB9 okayportsportendpointC>codec@ff410000rockchip,rk3328-codecA* ppclkmclk9 okay Dphy@ff430000rockchip,rk3328-hdmi-phyC SEypsysclkrefoclkrefpclk ]hdmi_phy@F cpu-version okay?clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD9@x=&'(ABDC"\5H4$zEEE|n6n6n6n6#FLGрxhxhрxhxhsyscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyEpphyclk ]usb480m_phy@{G okayGotg-port$;<=fotg-bvalidotg-idlinestate okayUhost-port > flinestate okayVmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNpbiuciuciu-driveciu-sample%р okay3=O`defaultHIJKkwmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KOpbiuciuciu-driveciu-sample%р  disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPpbiuciuciu-driveciu-sample%р okay3=default LMNkwethernet@ff540000rockchip,rk3328-gmacT fmacirq8dWXZYMpstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth9 okaydfOOinputPrgmiidefaultQ&mdiosnps,dwmac-mdio+ethernet-phy@0''u0 9(Pethernet@ff550000rockchip,rk3328-gmacU9 fmacirq8TSSUVIpstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb stmmacethrmiiRoutput  disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultSTERusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X MpotgWhost_q@ U usb2-phy okayusb@ff5c0000 generic-ehci\  NGVusb okaydefaultWXYZ[\usb@ff5d0000 generic-ohci]  NGVusb  disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`apref_clksuspend_clkbus_clkWotg utmi_wide  -  disabledinterrupt-controller@ff811000 arm,gic-400 F W@ @ `   pinctrlrockchip,rk3328-pinctrl9+ lgpio0@ff210000rockchip,gpio-bank! 3/ W Fjgpio1@ff220000rockchip,gpio-bank" 4/ W Fgpio2@ff230000rockchip,gpio-bank# 5/ W F(gpio3@ff240000rockchip,gpio-bank$ 6/ W Fpcfg-pull-up s_pcfg-pull-down gpcfg-pull-none ]pcfg-pull-none-2ma  fpcfg-pull-up-2ma s pcfg-pull-up-4ma s `pcfg-pull-none-4ma  cpcfg-pull-down-4ma  pcfg-pull-none-8ma  apcfg-pull-up-8ma s bpcfg-pull-none-12ma  dpcfg-pull-up-12ma s epcfg-output-high ipcfg-output-low hpcfg-input-high s ^pcfg-input i2c0i2c0-xfer ]]&i2c1i2c1-xfer ]]'i2c2i2c2-xfer  ]]+i2c3i2c3-xfer ]],i2c3-pins ]]hdmi_i2chdmii2c-xfer ]]Apdm-0pdmm0-clk ]pdmm0-fsync ]pdmm0-sdi0 ]pdmm0-sdi1 ]pdmm0-sdi2 ]pdmm0-sdi3 ]pdmm0-clk-sleep ^pdmm0-sdi0-sleep ^pdmm0-sdi1-sleep ^pdmm0-sdi2-sleep ^pdmm0-sdi3-sleep ^pdmm0-fsync-sleep ^tsadcotp-pin  ]7otp-out  ]8uart0uart0-xfer  ]_uart0-cts  ] uart0-rts  ]!uart0-rts-pin  ]uart1uart1-xfer ]_"uart1-cts ]#uart1-rts ]$uart1-rts-pin ]uart2-0uart2m0-xfer ]_uart2-1uart2m1-xfer ]_%spi0-0spi0m0-clk _spi0m0-cs0  _spi0m0-tx  _spi0m0-rx  _spi0m0-cs1  _spi0-1spi0m1-clk _spi0m1-cs0 _spi0m1-tx _spi0m1-rx _spi0m1-cs1 _spi0-2spi0m2-clk _-spi0m2-cs0 _0spi0m2-tx _.spi0m2-rx _/i2s1i2s1-mclk ]i2s1-sclk ]i2s1-lrckrx ]i2s1-lrcktx ]i2s1-sdi ]i2s1-sdo ]i2s1-sdio1 ]i2s1-sdio2 ]i2s1-sdio3 ]i2s1-sleep ^^^^^^^^^i2s2-0i2s2m0-mclk ]i2s2m0-sclk ]i2s2m0-lrckrx ]i2s2m0-lrcktx ]i2s2m0-sdi ]i2s2m0-sdo ]i2s2m0-sleep` ^^^^^^i2s2-1i2s2m1-mclk ]i2s2m1-sclk ]i2sm1-lrckrx ]i2s2m1-lrcktx ]i2s2m1-sdi ]i2s2m1-sdo ]i2s2m1-sleepP ^^^^^spdif-0spdifm0-tx ]spdif-1spdifm1-tx ]spdif-2spdifm2-tx ]sdmmc0-0sdmmc0m0-pwren `sdmmc0m0-pin `sdmmc0-1sdmmc0m1-pwren `sdmmc0m1-pin `sdmmc0sdmmc0-clk aHsdmmc0-cmd bIsdmmc0-dectn `Jsdmmc0-wrprt `sdmmc0-bus1 bsdmmc0-bus4@ bbbbKsdmmc0-pins ````````sdmmc0extsdmmc0ext-clk csdmmc0ext-cmd `sdmmc0ext-wrprt `sdmmc0ext-dectn `sdmmc0ext-bus1 `sdmmc0ext-bus4@ ````sdmmc0ext-pins ````````sdmmc1sdmmc1-clk  asdmmc1-cmd  bsdmmc1-pwren bsdmmc1-wrprt bsdmmc1-dectn bsdmmc1-bus1 bsdmmc1-bus4@ bbbbsdmmc1-pins  ` ````````emmcemmc-clk dLemmc-cmd eMemmc-pwren ]emmc-rstnout ]emmc-bus1 eemmc-bus4@ eeeeemmc-bus8 eeeeeeeeNpwm0pwm0-pin ]1pwm1pwm1-pin ]2pwm2pwm2-pin ]3pwmirpwmir-pin ]4gmac-1rgmiim1-pins`  a ccaccc c ca accaaa acaaaaQrmiim1-pins fdffff f fd d ] ]]]]]gmac2phyfephyled-speed10 ]fephyled-duplex ]fephyled-rxm1 ]Sfephyled-txm1 ]fephyled-linkm1 ]Ttsadc_pintsadc-int  ]tsadc-pin  ]hdmi_pinhdmi-cec ]@hdmi-hpd gBcif-0dvp-d2d9-m0 ]]]]] ] ] ]]]]]cif-1dvp-d2d9-m1 ]]]]]]]]]]]]pmicpmic-int-l _)usb3usb30-host-drv ]kwifibt-dis hWbt-wake-host _Xchip-en hYhost-wake-bt iZwl-dis h[wl-wake-host _\chosen serial2:1500000n8external-gmac-clock fixed-clockMsY@ ]gmac_clkin@Ousb3-current-switchregulator-fixed  jdefaultk Ivcc_host_5v *vcc-sysregulator-fixedIvcc_sysXLK@pLK@*ir-receivergpio-ir-receiver ( rc-beelink-gs1 compatibleinterrupt-parent#address-cells#size-cellsmodelserial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shifti2c-scl-falling-time-nsi2c-scl-rising-time-nsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-namesmali-supply#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesmute-gpiosnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vno-sdno-sdionon-removablesnps,txpblclock_in_outphy-handlephy-modephy-supplysnps,aalsnps,pbltx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathenable-active-highgpiovin-supplylinux,rc-map-name