q,8gX( g Sony Xperia Z1 !sony,xperia-honamiqcom,msm8974,reserved-memory=mpss@8000000DHmba@d100000D Hreserved@d200000D Hadsp@dc00000D HOvenus@f500000DPPHsmem@fa00000D HOtz@fc00000DHrfsa@fd60000DHrmtfs@fd80000DHcpus W cpu@0 !qcom,kraitbqcom,kpss-acc-v2pcpuD|O?cpu@1 !qcom,kraitbqcom,kpss-acc-v2pcpuD|OAcpu@2 !qcom,kraitbqcom,kpss-acc-v2pcpuD| OCcpu@3 !qcom,kraitbqcom,kpss-acc-v2pcpuD|  OEl2-cache!cache Oidle-statesspc#!qcom,idle-state-spcarm,idle-stateOmemorypmemoryDthermal-zonescpu-thermal0 tripstrip0!$-wpassivetrip1!- wcriticalcpu-thermal1 tripstrip0!$-wpassivetrip1!- wcriticalcpu-thermal2 tripstrip0!$-wpassivetrip1!- wcriticalcpu-thermal3 tripstrip0!$-wpassivetrip1!- wcriticalcpu-pmu!qcom,krait-pmu Wclocksxo_board !fixed-clock8E$Osleep_clk !fixed-clock8Etimer!arm,armv7-timer0WE$adsp-pil!qcom,msm8974-adsp-pil@U#iwdogfatalreadyhandoverstop-ackyxostopsmem !qcom,smemsmp2p-adsp !qcom,smp2p, W  master-kernelmaster-kernel&Oslave-kernel slave-kernel=ROsmp2p-modem !qcom,smp2p, W master-kernelmaster-kernel&slave-kernel slave-kernel=Rsmp2p-wcnss !qcom,smp2p, W master-kernelmaster-kernel&slave-kernel slave-kernel=Rsmsm !qcom,smsm c  n  yapps@0D&modem@1D W=Radsp@2D W=Rwcnss@7D W=Rfirmwarescm !qcom,scmcorebusifacesoc= !simple-businterrupt-controller@f9000000!qcom,msm-qgic2=RD Osyscon@f9011000!sysconDOqfprom@fc4bc000 !qcom,qfpromDKcalib@d0DObackup@440D@Othermal-sensor@fc4a9000!qcom,msm8974-tsensDJJcalibcalib_backup O timer@f9020000=!arm,armv7-timer-memDE$frame@f9021000WD frame@f9023000 W D0 disabledframe@f9024000 W D@ disabledframe@f9025000 W DP disabledframe@f9026000 W D` disabledframe@f9027000 W Dp disabledframe@f9028000 WD disabledpower-controller@f9089000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2DOpower-controller@f9099000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D Opower-controller@f90a9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D O power-controller@f90b9000%!qcom,msm8974-saw2-v2.1-cpuqcom,saw2D O power-controller@f9012000 !qcom,saw2D O clock-controller@f9088000!qcom,kpss-acc-v2DOclock-controller@f9098000!qcom,kpss-acc-v2D Oclock-controller@f90a8000!qcom,kpss-acc-v2D Oclock-controller@f90b8000!qcom,kpss-acc-v2D O restart@fc4ab000 !qcom,psholdDJclock-controller@fc400000!qcom,gcc-msm89748D@@Osyscon@fd4a0000!sysconDJsyscon@fd484000!sysconDH@ Oclock-controller@fd8c0000!qcom,mmcc-msm89748D`OGtcsr-mutex!qcom,tcsr-mutex  Omemory@fc428000!qcom,rpm-msg-ramDB@Oserial@f991d000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD WkeW coreiface disabledserial@f991e000%!qcom,msm-uartdm-v1.4qcom,msm-uartdmD WlgW coreifaceokdefault'sdhci@f9824900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4DI@1hc_memcore_memW{ihc_irqpwr_irqcoreifacexook;GT^default'sdhci@f9864900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4DI@1hc_memcore_memWihc_irqpwr_irqcoreifacexo disabledsdhci@f98a4900%!qcom,msm8974-sdhciqcom,sdhci-msm-v4DI@1hc_memcore_memW}ihc_irqpwr_irqcoreifacexookT;G  l!>default'"#usb@f9a55000 !qcom,ci-hdrcDPR W  ifacecoreu xh coreulpiotgusb-phy disabledO$ulpiphy@a(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phy  refsleep $phypor disabledphy@b(!qcom,usb-hs-phy-msm8974qcom,usb-hs-phy  refsleep $phypor disabledrng@f9bff000 !qcom,prngDcorepinctrl@fd510000!qcom,msm8974-pinctrlDQ@=R WO!blsp1-uart2-pin-activeOrxgpio5 blsp_uart2txgpio4 blsp_uart2*i2c2O%mux gpio6gpio7 blsp_i2c2*sdhc1-pin-activeOclk sdc1_clk*cmd-datasdc1_cmdsdc1_data sdhc2-cd-pin-activegpio62gpio*O#sdhc2-pin-activeO"clk sdc2_clk *cmd-datasdc2_cmdsdc2_datatouch-intO(pingpio61gpio*7i2c@f9923000 disabled!qcom,i2c-qup-v2.1.1D0 W_YW coreifacei2c@f9924000ok!qcom,i2c-qup-v2.1.1D@ W`[W coreifaceEjDdefault'%synaptics@2c!syna,rmi4-i2cD, U!=R&]'default'(h rmi4-f01@1D~rmi4-f11@11Di2c@f9925000 disabled!qcom,i2c-qup-v2.1.1DP Wa]W coreifacei2c@f9964000 disabled!qcom,i2c-qup-v2.1.1D@ Wfuq coreifacei2c@f9967000 disabled!qcom,i2c-qup-v2.1.1Dp Wi{q coreiface))txrxi2c@f9968000 disabled!qcom,i2c-qup-v2.1.1D Wj}q coreifacespmi@fc4cf000!qcom,spmi-pmic-arb1coreintrcnfgDLLL iperiph_irq W=Rpm8841@4!qcom,pm8841qcom,spmi-pmicDmpps@a000!qcom,pm8841-mppqcom,spmi-mppD@Wtemp-alarm@2400!qcom,spmi-temp-alarmD$W$pm8841@5!qcom,pm8841qcom,spmi-pmicDpm8941@0!qcom,pm8941qcom,spmi-pmicDrtc@6000!qcom,pm8941-rtcD`a 1rtcalarmWapwrkey@800!qcom,pm8941-pwrkeyDW= misc@900!qcom,pm8941-miscD W iusb_idcharger@1000!qcom,pm8941-chargerDWOichg-donechg-fastchg-trklbat-temp-okbat-presentchg-goneusb-validdc-valid*``4w@JC#hB`03@@@Aotg-vbusgpios@c000 !qcom,pm8941-gpioqcom,spmi-gpioD+$=RO+boost-bypassgpio21normalOOgpio-keys-activegpio2gpio3gpio4gpio5normalOPmpps@a000!qcom,pm8941-mppqcom,spmi-mppDWtemp-alarm@2400!qcom,spmi-temp-alarmD$W$,thermalvadc@3100!qcom,spmi-vadcD1W1-O,bat_tempD0die_tempDref_625mvD ref_1250vD ref_gndDref_vddDvbat_snsDiadc@3600 !qcom,pm8941-iadcqcom,spmi-iadcD6W6?'coincell@2800!qcom,pm8941-coincellD(oka4p pm8941@1!qcom,pm8941qcom,spmi-pmicDwled@d800!qcom,pm8941-wledD backlightok%@regulators!qcom,pm8941-regulators Wiocp-5vs1ocp-5vs2-s4LK@LK@0O-5vs10L` O*dma-controller@f9944000!qcom,bam-v1.4.0D@ Wqbam_clkO)etr@fc322000 !arm,coresight-tmcarm,primecellD2 .. apb_pclkatclkin-portsportendpoint/O1tpiu@fc318000!!arm,coresight-tpiuarm,primecellD1.. apb_pclkatclkin-portsportendpoint0O2replicator@fc31c000/!arm,coresight-dynamic-replicatorarm,primecellD1.. apb_pclkatclkout-portsport@0Dendpoint1O/port@1Dendpoint2O0in-portsportendpoint3O4etf@fc307000 !arm,coresight-tmcarm,primecellD0p.. apb_pclkatclkout-portsportendpoint4O3in-portsportendpoint5O7funnel@fc31b000+!arm,coresight-dynamic-funnelarm,primecellD1.. apb_pclkatclkin-portsport@1Dendpoint6O9out-portsportendpoint7O5funnel@fc31a000+!arm,coresight-dynamic-funnelarm,primecellD1.. apb_pclkatclkin-portsport@5Dendpoint8O>out-portsportendpoint9O6funnel@fc345000+!arm,coresight-dynamic-funnelarm,primecellD4P.. apb_pclkatclkin-portsport@0Dendpoint:O@port@1Dendpoint;OBport@2Dendpoint<ODport@3Dendpoint=OFout-portsportendpoint>O8etm@fc33c000"!arm,coresight-etm4xarm,primecellD3.. apb_pclkatclk?out-portsportendpoint@O:etm@fc33d000"!arm,coresight-etm4xarm,primecellD3.. apb_pclkatclkAout-portsportendpointBO;etm@fc33e000"!arm,coresight-etm4xarm,primecellD3.. apb_pclkatclkCout-portsportendpointDO<etm@fc33f000"!arm,coresight-etm4xarm,primecellD3.. apb_pclkatclkEout-portsportendpointFO=mdss@fd900000 disabled !qcom,mdssD@1mdss_physvbif_physGG]G^Gmifacebusvsync WH=R=OHmdp@fd900000 disabled !qcom,mdp5D  1mdp_phys,HW G]G^GiGmifacebuscorevsyncportsport@0DendpointIOKdsi@fd922800 disabled!qcom,mdss-dsi-ctrlD( 1dsi_ctrl,HWuG!G%JJ8GiG]G^G_GkGdGn-mdp_coreifacebusbytepixelcorecore_mmss<Jdsi-phyportsport@0DendpointKOIport@1Dendpointdsi-phy@fd922a00 disabled!qcom,dsi-phy-28nm-hpmD*+-0"1dsi_plldsi_phydsi_phy_regulator8A G] ifacerefOJsmd !qcom,smdadsp W Tmodem W  Trpm W Trpm_requests!qcom,rpm-msm8974 brpm_requestsclock-controller!qcom,rpmcc-msm8974qcom,rpmcc8O.pm8841-regulators!qcom,rpm-pm8841-regulatorss1 Ls2 Os3 s4 s5s6s7s8pm8941-regulators!qcom,rpm-pm8941-regulatorstLLMMNN Ns1    1OLs2 p p 1OMs3w@w@  1Ol1((  1l2OOl3OOl4((l5w@w@l6w@w@ 1l7w@w@ 1l8w@w@l9w@-pl10l11 pl12w@w@  1l13w@-p 1O l14w@w@l15GGl16)2)2l17)2)2l18+|+|l192Z2Zl20-p-p C 1 \ @Ol21-p-p 1Ol22--O&l23**l24.. 1lvs1lvs2lvs3O's4LK@LK@vreg-boost!regulator-fixed rvreg-boost00  1 + default'OONvreg-vph-pwr!regulator-fixed rvph-pwr66 aliases /soc/serial@f991e000chosen serial0:115200n8gpio-keys !gpio-keys gpio-keysdefault'Pvolume-down volume_down o+  rcamera-snapshotcamera_snapshot o+  camera-focus camera_focus o+  volume-up volume_up o+  smemory@0D@@@pmemory #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleinterruptsenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#clock-cellsclock-frequencyinterrupts-extendedinterrupt-namescx-supplyclocksclock-namesmemory-regionqcom,smem-statesqcom,smem-state-namesqcom,rpm-msg-ramhwlocksqcom,smemqcom,ipcqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsqcom,ipc-1qcom,ipc-2qcom,ipc-3nvmem-cellsnvmem-cell-names#qcom,sensors#thermal-sensor-cellsframe-numberstatusregulator#reset-cells#power-domain-cellssyscon#hwlock-cellspinctrl-namespinctrl-0reg-namesvmmc-supplyvqmmc-supplybus-widthnon-removablecd-gpiosassigned-clocksassigned-clock-ratesresetsreset-namesphy_typedr_modeahb-burst-configphy-names#phy-cellsgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-upbias-disableinput-enableqcom,src-freqvdd-supplyvio-supplysyna,startup-delay-mssyna,nosleep-modetouchscreen-inverted-xsyna,sensor-typedmasdma-namesqcom,eeqcom,channeldebounceusb-otg-in-supplyqcom,fast-charge-safe-currentqcom,fast-charge-current-limitqcom,dc-current-limitqcom,fast-charge-safe-voltageqcom,fast-charge-high-threshold-voltageqcom,fast-charge-low-threshold-voltageqcom,auto-recharge-threshold-voltageqcom,minimum-input-voltagegpio-rangespower-sourceio-channelsio-channel-names#io-channel-cellsqcom,external-resistor-micro-ohmsqcom,rset-ohmsqcom,vset-millivoltslabelqcom,cs-outqcom,current-limitqcom,current-boost-limitqcom,switching-freqqcom,ovpqcom,num-stringsvin_5vs-supplyregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-pull-downregulator-over-current-protectionqcom,ocp-max-retriesqcom,ocp-retry-delayqcom,vs-soft-start-strengthregulator-initial-mode#dma-cellsqcom,controlled-remotelyremote-endpointcpupower-domainsassigned-clock-parentsphysqcom,dsi-phy-indexqcom,smd-edgeqcom,smd-channelsvdd_l1_l3-supplyvdd_l2_lvs1_2_3-supplyvdd_l4_l11-supplyvdd_l5_l7-supplyvdd_l6_l12_l14_l15-supplyvdd_l9_l10_l17_l22-supplyvdd_l13_l20_l23_l24-supplyvdd_l21-supplyregulator-always-onregulator-boot-onregulator-allow-set-loadregulator-system-loadregulator-namegpioenable-active-highserial0stdout-pathinput-namelinux,input-typelinux,code